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TC74HC240AP PDF预览

TC74HC240AP

更新时间: 2024-11-29 05:04:11
品牌 Logo 应用领域
东芝 - TOSHIBA 总线驱动器总线收发器逻辑集成电路光电二极管
页数 文件大小 规格书
8页 287K
描述
Octal Bus Buffer

TC74HC240AP 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:DIP包装说明:DIP, DIP20,.3
针数:20Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.02
控制类型:ENABLE LOW系列:HC/UH
JESD-30 代码:R-PDIP-T20长度:24.6 mm
负载电容(CL):150 pF逻辑集成电路类型:BUS DRIVER
最大I(ol):0.006 A位数:4
功能数量:2端口数量:2
端子数量:20最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:INVERTED封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装等效代码:DIP20,.3
封装形状:RECTANGULAR封装形式:IN-LINE
峰值回流温度(摄氏度):NOT SPECIFIED电源:2/6 V
Prop。Delay @ Nom-Sup:23 ns传播延迟(tpd):165 ns
认证状态:Not Qualified座面最大高度:4.45 mm
子类别:Bus Driver/Transceivers最大供电电压 (Vsup):6 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):4.5 V
表面贴装:NO技术:CMOS
温度等级:INDUSTRIAL端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:7.62 mm
Base Number Matches:1

TC74HC240AP 数据手册

 浏览型号TC74HC240AP的Datasheet PDF文件第2页浏览型号TC74HC240AP的Datasheet PDF文件第3页浏览型号TC74HC240AP的Datasheet PDF文件第4页浏览型号TC74HC240AP的Datasheet PDF文件第5页浏览型号TC74HC240AP的Datasheet PDF文件第6页浏览型号TC74HC240AP的Datasheet PDF文件第7页 
TC74HC240,244AP/AF,241AP/AF  
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic  
TC74HC240AP,TC74HC240AF,TC74HC241AP  
TC74HC241AF,TC74HC244AP,TC74HC244AF  
Octal Bus Buffer  
TC74HC240AP/AF  
TC74HC241AP/AF  
TC74HC244AP/AF  
Inverted, 3-State  
Outputs  
TC74HC240AP, TC74HC241AP,  
TC74HC244AP  
Non-Inverted,  
3-State Outputs  
Non-Inverted,  
3-State Outputs  
The TC74HC240A, 241A and 244A are high speed CMOS  
OCTAL BUS BUFFERs fabricated with silicon gate C2MOS  
technology.  
They achieve the high speed operation similar to equivalent  
LSTTL while maintaining the CMOS low power dissipation.  
The 74HC240A is an inverting 3-state buffer having two  
active-low output enables. The TC74HC241A and TC74HC244A  
are non-inverting 3-state buffers that differ only in that the 241A  
has one active-high and one active-low output enable, and the  
244A has two active-low output enables.  
TC74HC240AF, TC74HC241AF, TC74HC244AF  
These devices are designed to be used with 3-state memory  
address drivers, etc.  
All inputs are equipped with protection circuits against static  
discharge or transient excess voltage.  
Weight  
DIP20-P-300-2.54A  
SOP20-P-300-1.27A  
: 1.30 g (typ.)  
: 0.22 g (typ.)  
Features  
High speed: t = 10 ns (typ.) at V  
= 5 V  
pd  
CC  
Low power dissipation: I  
= 4 μA (max) at Ta = 25°C  
CC  
High noise immunity: V  
= V  
= 28% V  
(min)  
NIH  
NIL  
CC  
Output drive capability: 15 LSTTL loads  
Symmetrical output impedance: |I | = I  
= 6 mA (min)  
OL  
OH  
Balanced propagation delays: t  
t
pHL  
pLH  
Wide operating voltage range: V  
(opr) = 2~6 V  
CC  
Pin and function compatible with 74LS240/241/244  
1
2007-10-01  

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