Datasheet > TC51WKM616AXGN75

TC51WKM616AXGN75

更新时间： 2024-01-24 17:44:35

品牌	Logo	应用领域
东芝 - TOSHIBA		/
页数	文件大小	规格书
10页	212K
描述
IC 4M X 16 PSEUDO STATIC RAM, 75 ns, PBGA48, 8 X 11 MM, 0.75 MM PITCH, LEAD FREE, PLASTIC, TFBGA-48, Static RAM

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技术参数
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TC51WKM616AXGN75 技术参数

生命周期：	Obsolete	零件包装代码：	BGA
包装说明：	TFBGA, BGA48,6X8,30	针数：	48
Reach Compliance Code：	unknown	ECCN代码：	3A991.B.2.A
HTS代码：	8542.32.00.41	风险等级：	5.84
Base Number Matches：	1

TC51WKM616AXGN75 数据手册

TC51WKM616AXGN75

TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS

Lead-Free

4,194,304-WORD BY 16-BIT CMOS PSEUDO STATIC RAM

DESCRIPTION

The TC51WKM616AXGN is a 67,108,864-bit pseudo static random access memory(PSRAM) organized as

4,194,304 words by 16 bits. Using Toshiba’s CMOS technology and advanced circuit techniques, it provides high

density, high speed and low power. The device uses dual power supplies(2.6 to 3.3 V for core and 1.7 to 2.2 V for

output buffer). The device also features SRAM-like W/R timing whereby the device is controlled by CE1 , OE , and

WE on asynchronous. The device has the page access operation. Page size is 8 words. The device also supports

deep power-down mode, realizing low-power standby.

•

Access Times:

Access Time

FEATURES

•

Organized as 4,194,304 words by 16 bits

Dual power supplies(2.6 to 3.3 V for core and

1.7 to 2.2 V for output buffer)

75 ns

25 ns

30 ns

CE1 Access Time

OE Access Time

Page Access Time

Package:

•

Direct TTL compatibility for all inputs and outputs

Deep power-down mode: Memory cell data invalid

Page operation mode:

Page read operation by 8 words

•

Logic compatible with SRAM R/W ( WE ) pin

Standby current

Standby

P-TFBGA48-0811-0.75BZ (Weight:0.155 g typ.)

Lead-Free

100 µA

5 µA

Deep power-down standby

PIN ASSIGNMENT (TOP VIEW)

PIN NAMES

A0 to A21

A0 to A2

Address Inputs

Page Address Inputs

CE2

I/O1

I/O3

I/O1 to I/O16 Data Inputs/Outputs

I/O9

CE1

I/O2

I/O4

CE1

CE2

Chip Enable Input

I/O10 I/O11

Chip select Input

GND I/O12 A17

I/O13 A21

Write Enable Input

Output Enable Input

Data Byte Control Inputs

Power Supply for Core

Power Supply for Output Buffer

Ground

A16

A15

A13

A10

I/O5 GND

I/O6 I/O7

WE I/O8

A11 A20

DDQ

I/O15 I/O14 A14

LB , UB

I/O16 A19

A18 A8

A12

DDQ

(FBGA48)

GND

2005-03-11 1/10

12 3 4 5 6 7...10

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