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T83C5101ZZZ-ICFCV PDF预览

T83C5101ZZZ-ICFCV

更新时间： 2025-01-18 13:14:23
品牌 Logo 应用领域
TEMIC 微控制器
页数 文件大小 规格书
52页 244K
描述
Microcontroller, 8-Bit, MROM, 40MHz, CMOS, PDSO24, SO-24

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中文翻译

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T83C5101ZZZ-ICFCV 技术参数

生命周期：Transferred包装说明：SO-24
Reach Compliance Code：unknown风险等级：5.71
Is Samacsys：N具有ADC：NO
地址总线宽度：位大小：8
最大时钟频率：40 MHzDAC 通道：NO
DMA 通道：NO外部数据总线宽度：
JESD-30 代码：R-PDSO-G24I/O 线路数量：18
端子数量：24最高工作温度：70 °C
最低工作温度：PWM 通道：NO
封装主体材料：PLASTIC/EPOXY封装形状：RECTANGULAR
封装形式：SMALL OUTLINE认证状态：Not Qualified
ROM可编程性：MROM速度：40 MHz
最大供电电压：5.5 V最小供电电压：4.5 V
标称供电电压：5 V表面贴装：YES
技术：CMOS温度等级：COMMERCIAL
端子形式：GULL WING端子位置：DUAL
uPs/uCs/外围集成电路类型：MICROCONTROLLERBase Number Matches：1

T83C5101ZZZ-ICFCV 数据手册

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T87C5101  
T83C5101/02  
8-bit Low pin count Microcontrollers, 0-66 MHz  
1. Description  
TEMIC T8xC5101/02 family is a high performance In addition, the T8xC5101/02 family has an XRAM of  
CMOS ROM, OTP, EPROM derivative of the 80C51 256 bytes, the X2 feature, a more versatile serial channel  
CMOS single chip 8-bit microcontroller.  
that facilitates multiprocessor communication (EUART),  
a dual data pointer and an improved timer 2.  
The T8xC5101/02 family is a low pin count device  
where only Port 1, port 3 and 2/6 bits of a new port 4 The fully static design of the T8xC5101/02 family allows  
are outputted. This prevents to do any external access, to reduce system power consumption by bringing the  
like external program memory access (fetch, MOVC) or clock frequency down to any value, even DC, without  
external data memory (MOVX)  
loss of data.  
The T8xC5101/02 family retains all features of the The T8xC5101/02 family has 2 software-selectable  
modes of reduced activity for further reduction in power  
consumption. In the idle mode the CPU is frozen while  
the timers, the serial port and the interrupt system are still  
operating. In the power-down mode the RAM is saved  
and all other functions are inoperative.  
TEMIC 80C51 with extended capacity 8Kb ROM (5102),  
16Kb ROM (5101) / 16Kb EPROM/OTP (5101) , 256  
bytes of internal RAM, a 6-source, 4-level interrupt  
system, an on-chip oscillator and three timer/counters.  
2. Features  
● 80C51 code Compatible  
-
66MHz with a 33MHz crystal in X2 mode  
•
•
8051 instruction compatible  
● Dual Data Pointer  
16 I/O + 2 Outputs in 24 pin packages  
16 I/O + 6 Outputs in 28 pin packages  
● On-chip eXpanded RAM (XRAM) (256 bytes)  
● Programmable Clock Out and Up/Down Timer/  
Counter 2  
•
•
Three 16-bit timer/counters  
256 bytes scratchpad RAM  
● Asynchronous port reset  
● Interrupt Structure with  
● Program Memory  
•
•
6 Interrupt sources,  
•
•
•
8Kb ROM T83C5102  
4 level priority interrupt system  
16Kb ROM T83C5101  
● Full duplex Enhanced UART  
16Kb EPROM/OTP T87C5101  
•
•
Framing error detection  
● High-Speed Architecture  
Automatic address recognition  
•
40 MHz from 2.7 to 5.5V, commercial or  
industrial temperature range :  
● Low EMI (no ALE)  
● Power Control modes  
-
-
40 MHz with a 40 MHz crystal in std mode  
40 MHz with a 20 MHz crystal in X2 mode  
•
•
Idle mode  
•
66 MHz from 4.5 to 5.5V, commercial  
temperature range  
Power-down mode  
● Packages: SO24, DIL24, TSSOP24*, SO28*  
* check for availability  
-
40MHz with a 40 MHz crystal in std mode  
Rev. E - 29 February 2000  
1
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T83C5101ZZZ-TDSCL TEMIC

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 		Microcontroller, 8-Bit, MROM, 40MHz, CMOS, PDSO24, SO-24
T83C5101ZZZ-TDSIL TEMIC

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 		Microcontroller, 8-Bit, MROM, 40MHz, CMOS, PDSO24, SO-24
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T83C5101ZZZ-TIRCV TEMIC

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 		Microcontroller, 8-Bit, MROM, 40MHz, CMOS, PDSO28, SO-28
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 		Microcontroller, 8-Bit, MROM, 40MHz, CMOS, PDSO28, SO-28

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