Datasheet > T83C5101_14

T83C5101_14

更新时间： 2025-01-19 01:21:39

品牌	Logo	应用领域
爱特美尔 - ATMEL		/
页数	文件大小	规格书
58页	679K
描述
Programmable Clock Out and Up/Down Timer/Counter 2

阅读下载

中文翻译

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

T83C5101_14 数据手册

Features

80C51 Code Compatible

•

– 8051 Instruction Compatible

– 16 I/O + 2 Outputs in 24 Pin Packages

16 I/O + 6 Outputs in 28 Pin Packages

– Three 16-bit Timer/Counters

– 256 Bytes Scratchpad RAM

•

Program Memory

– 8 KB ROM T83C5102

– 16 KB ROM T83C5101

– 16 KB EPROM/OTP T87C5101

High-speed Architecture

8-bit Low Pin

Count

•

40 MHz from 2.7 to 5.5V, Commercial or Industrial Temperature Range:

– 40 MHz with a 40 MHz Crystal In Std. Mode

– 40 MHz with a 20 MHz Crystal In X2 Mode

66 MHz from 4.5 to 5.5V, Commercial Temperature Range

– 40 MHz with a 40 MHz Crystal in Std. Mode

– 66 MHz with a 33 MHz Crystal in X2 Mode

Dual Data Pointer

Microcontrollers

•

T83C5101

T87C5101

T83C5102

On-chip eXpanded RAM (XRAM) (256 bytes)

Programmable Clock Out and Up/Down Timer/Counter 2

Asynchronous Port Reset

Interrupt Structure with

– 6 Interrupt Sources,

– 4-Level Priority Interrupt System

Full-duplex Enhanced UART

– Framing Error Detection

•

– Automatic Address Recognition

Low EMI (no ALE)

Power Control Modes

•

– Idle Mode

– Power-down Mode

Packages: SO24, DIL24, SSOP24, SO28

•

Description

The T8xC5101/02 family is a high performance CMOS ROM, OTP, EPROM derivative

of the 80C51 CMOS single chip 8-bit microcontroller.

The T8xC5101/02 family is a low pin count device where only Port 1, port 3 and 2/6

bits of a new port 4 are outputted. This prevents any external access, like external pro-

gram memory access (fetch, MOVC) or external data memory (MOVX). The

T8xC5101/02 family retains all features of the 80C51 with extended capacity 8 KB

ROM (5102), 16 KB ROM (5101)/16 KB EPROM/OTP (5101), 256 bytes of internal

RAM, a 6-source, 4-level interrupt system, an on-chip oscillator and three

timer/counters.

In addition, the T8xC5101/02 family has an XRAM of 256 bytes, the X2 feature, a

more versatile serial channel that facilitates multiprocessor communication (EUART),

a dual data pointer and an improved timer 2. The fully static design of the

T8xC5101/02 family allows to reduce system power consumption by bringing the

clock frequency down to any value, even DC, without loss of data.

The T8xC5101/02 family has 2 software-selectable modes of reduced activity for fur-

ther reduction in power consumption. In idle mode the CPU is frozen while the timers,

the serial port and the interrupt system are still operating. In power-down mode the

RAM is saved and all other functions are inoperative.

Rev. 4233H–8051–02/08

12 3 4 5 6 7...58

中文翻译

下载PDF

与T83C5101_14相关器件

型号	品牌	获取价格	描述	数据表
T83C5102	TEMIC	获取价格	8-bit Low pin count Microcontrollers, 0-66 MHz
T83C5102	ATMEL	获取价格	8-bit Low Pin Count Microcontrollers
T83C5102-ICFCV	TEMIC	获取价格	暂无描述
T83C5102-ICUCL	TEMIC	获取价格	暂无描述
T83C5102-ICUIL	TEMIC	获取价格	暂无描述
T83C5102-TIRCL	TEMIC	获取价格	暂无描述
T83C5102-TIRIL	TEMIC	获取价格	暂无描述
T83C5102-TISCL	TEMIC	获取价格	Microcontroller, 8-Bit, MROM, 8051 CPU, 40MHz, CMOS, PDSO28,
T83C5102-TISCV	TEMIC	获取价格	暂无描述
T83C5102-TISIL	TEMIC	获取价格	Microcontroller, 8-Bit, MROM, 8051 CPU, 40MHz, CMOS, PDSO28,

产品中心

服务支持

精选活动

关于我们

帮助中心

T83C5101_14

T83C5101_14 数据手册

与T83C5101_14相关器件

与T83C5101_14相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

T83C5101_14

T83C5101_14 数据手册

与T83C5101_14相关器件

与T83C5101_14相关文章

您还可以找

您在本页遇到什么问题？