T83C5101

更新时间： 2025-01-18 03:29:23

品牌	Logo	应用领域
TEMIC		微控制器
页数	文件大小	规格书
52页	244K
描述
8-bit Low pin count Microcontrollers, 0-66 MHz

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T83C5101 数据手册

T87C5101

T83C5101/02

8-bit Low pin count Microcontrollers, 0-66 MHz

1. Description

TEMIC T8xC5101/02 family is a high performance In addition, the T8xC5101/02 family has an XRAM of

CMOS ROM, OTP, EPROM derivative of the 80C51 256 bytes, the X2 feature, a more versatile serial channel

CMOS single chip 8-bit microcontroller.

that facilitates multiprocessor communication (EUART),

a dual data pointer and an improved timer 2.

The T8xC5101/02 family is a low pin count device

where only Port 1, port 3 and 2/6 bits of a new port 4 The fully static design of the T8xC5101/02 family allows

are outputted. This prevents to do any external access, to reduce system power consumption by bringing the

like external program memory access (fetch, MOVC) or clock frequency down to any value, even DC, without

external data memory (MOVX)

loss of data.

The T8xC5101/02 family retains all features of the The T8xC5101/02 family has 2 software-selectable

modes of reduced activity for further reduction in power

consumption. In the idle mode the CPU is frozen while

the timers, the serial port and the interrupt system are still

operating. In the power-down mode the RAM is saved

and all other functions are inoperative.

TEMIC 80C51 with extended capacity 8Kb ROM (5102),

16Kb ROM (5101) / 16Kb EPROM/OTP (5101) , 256

bytes of internal RAM, a 6-source, 4-level interrupt

system, an on-chip oscillator and three timer/counters.

2. Features

● 80C51 code Compatible

66MHz with a 33MHz crystal in X2 mode

•

8051 instruction compatible

● Dual Data Pointer

16 I/O + 2 Outputs in 24 pin packages

16 I/O + 6 Outputs in 28 pin packages

● On-chip eXpanded RAM (XRAM) (256 bytes)

● Programmable Clock Out and Up/Down Timer/

Counter 2

•

Three 16-bit timer/counters

256 bytes scratchpad RAM

● Asynchronous port reset

● Interrupt Structure with

● Program Memory

•

6 Interrupt sources,

•

8Kb ROM T83C5102

4 level priority interrupt system

16Kb ROM T83C5101

● Full duplex Enhanced UART

16Kb EPROM/OTP T87C5101

•

Framing error detection

● High-Speed Architecture

Automatic address recognition

•

40 MHz from 2.7 to 5.5V, commercial or

industrial temperature range :

● Low EMI (no ALE)

● Power Control modes

40 MHz with a 40 MHz crystal in std mode

40 MHz with a 20 MHz crystal in X2 mode

•

Idle mode

•

66 MHz from 4.5 to 5.5V, commercial

temperature range

Power-down mode

● Packages: SO24, DIL24, TSSOP24*, SO28*

* check for availability

40MHz with a 40 MHz crystal in std mode

Rev. E - 29 February 2000

12 3 4 5 6 7...52

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