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SY69753LHI-TR PDF预览

SY69753LHI-TR

更新时间: 2022-09-29 19:46:53
品牌 Logo 应用领域
美国微芯 - MICROCHIP /
页数 文件大小 规格书
13页 483K
描述
IC CLK DATA REC SDH 155MBPS

SY69753LHI-TR 数据手册

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SY69753L  
3.3V, 125Mbps, 155Mbps Clock  
and Data Recovery  
Use lower-power SY69753AL for new designs  
General Description  
Features  
The SY69753L is a complete Clock Recovery and Data  
Retiming integrated circuit for OC-3/STS-3 applications  
at 155Mbps NRZ. The device is ideally suited for  
SONET/SDH/ATM applications and other high-speed  
data transmission systems.  
3.3V power supply  
SONET/SDH/ATM compatible  
Clock and data recovery for 125Mbps/155Mbps NRZ  
data stream  
Two on-chip PLLs: one for clock generation and  
another for clock recovery  
Clock recovery and data retiming is performed by  
synchronizing the on-chip VCO directly to the incoming  
data stream. The VCO center frequency is controlled by  
the reference clock frequency and the selected divide  
ratio. On-chip clock generation is performed through the  
use of a frequency multiplier PLL with a byte rate source  
as reference.  
Selectable reference frequencies  
Differential PECL high-speed serial I/O  
Line receiver input: no external buffering needed  
Link fault indication  
100k ECL compatible I/O  
The SY69753L also includes a link fault detection circuit.  
Industrial temperature range (–40°C to +85°C)  
Complies with Bellcore, ITU/CCITT and ANSI  
Datasheets and support documentation can be found on  
Micrel’s web site at: www.micrel.com.  
specifications for OC-3 applications  
Available in 32-pin EPAD-TQFP  
Applications  
Ethernet media converter(m)  
SONET/SDH/ATM OC-3  
Proprietary architecture at 135Mbps to 180Mbps  
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com  
M9999-120307-F  
hbwhelp@micrel.com or (408) 955-1690  
December 2007  

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