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SY10EP51VKG PDF预览

SY10EP51VKG

更新时间: 2024-09-28 04:50:11
品牌 Logo 应用领域
麦瑞 - MICREL 触发器逻辑集成电路光电二极管时钟
页数 文件大小 规格书
7页 498K
描述
5V/3.3V D FLIP-FLOP WITH RESET AND DIFFERENTIAL CLOCK

SY10EP51VKG 数据手册

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5V/3.3V D FLIP-FLOP WITH RESET  
AND DIFFERENTIAL CLOCK  
ECL Pro™  
SY10EP51V  
FEATURES  
3.3V and 5V power supply options  
320ps typical propagation delay  
Maximum frequency > 3GHz typical  
75internal input pulldown resistor  
Transistor count: 143  
ECL Pro™  
DESCRIPTION  
Available in 8-Pin (3mm) MSOP and SOIC packages  
The SY10EP51V is a D flip-flop with reset and  
differential clock. The device is pin and functionally  
equivalent to the EL51 device.  
The reset input is an asynchronous, level triggered  
signal. Data enters the master portion of the flip-flop  
when CLK is LOW and is transferred to the slave, and  
thus the outputs, upon a positive transition of the CLK.  
The differential clock inputs of the EP51V allow the device  
to be used as a negative edge triggered flip-flop.  
The differential input employs clamp circuitry to  
maintain stability under open input conditions. When left  
open, the CLK input will be pulled down to V  
/CLK input will be biased a V /2.  
and the  
EE  
CC  
PIN NAMES  
TRUTH TABLE  
D
L
RESET  
CLK  
Z
Q
Pin  
CLK, /CLK  
RESET  
D
Function  
ECL Clock Inputs  
L
L
L
H
L
H
X
Z
ECL Asynchronous Reset  
ECL Data Input  
H
X
Z = LOW to HIGH Transition  
Q, /Q  
ECL Data Outputs  
Positive Supply  
VCC  
VEE  
Negative, 0 Supply  
ECL Pro is a trademark of Micrel, Inc.  
Rev.: D  
Amendment: /0  
M9999-112805  
hbwhelp@micrel.com or (408) 955-1690  
1
Issue Date: November2005  

SY10EP51VKG 替代型号

型号 品牌 替代类型 描述 数据表
SY10EP51VKG MICROCHIP

类似代替

10E SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO8
MC10EP51DTG ONSEMI

功能相似

3.3V / 5V ECL D Flip−Flop with Reset and Differential Clock

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