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SY10EL1189ZC PDF预览

SY10EL1189ZC

更新时间: 2024-11-23 22:24:15
品牌 Logo 应用领域
麦瑞 - MICREL 线路驱动器或接收器驱动程序和接口光纤接口集成电路光电二极管
页数 文件大小 规格书
4页 56K
描述
FIBRE CHANNEL COAXIAL

SY10EL1189ZC 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:SOIC包装说明:0.150 INCH, SOIC-16
针数:16Reach Compliance Code:not_compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.8差分输出:YES
驱动器位数:1输入特性:DIFFERENTIAL
接口集成电路类型:LINE TRANSCEIVER接口标准:GENERAL PURPOSE
JESD-30 代码:R-PDSO-G16JESD-609代码:e0
功能数量:1端子数量:16
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装形状:RECTANGULAR
封装形式:SMALL OUTLINE认证状态:Not Qualified
最大接收延迟:0.55 ns接收器位数:1
最大供电电压:5.25 V最小供电电压:4.75 V
标称供电电压:5 V表面贴装:YES
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子位置:DUAL
最大传输延迟:0.725 nsBase Number Matches:1

SY10EL1189ZC 数据手册

 浏览型号SY10EL1189ZC的Datasheet PDF文件第2页浏览型号SY10EL1189ZC的Datasheet PDF文件第3页浏览型号SY10EL1189ZC的Datasheet PDF文件第4页 
FIBRE CHANNEL COAXIAL  
CABLE DRIVER AND LOOP  
RESILIENCY CIRCUIT  
PRELIMINARY  
SY10EL1189  
FEATURES  
DESCRIPTION  
425ps propagation delay  
The SY10EL1189 is a differential receiver, differential  
transmitter specifically designed to drive coaxial cables.  
It incorporates the output cable driver capability of the  
SY10EL89 Coaxial Cable Driver with additional circuitry  
to multiplex the output cable drive source between the  
cable receiver or the local transmitter inputs. The  
multiplexer control circuitry is TTL compatible for ease of  
operation.  
1.6V output swings  
Single +5V operation  
Internal 75Kinput pull-down resistors  
Available in 16-pin SOIC package  
The SY10EL1189 is useful as a bypass element for  
Fibre Channel-Arbitrated Loop (FC-AL) or Serial Storage  
Architecture (SSA) applications, to create loop style  
interconnects with fault tolerant, active switches at each  
device node. This device is particularly useful for back  
panel applications where small size is desirable.  
LOGIC DIAGRAM  
From Input Cable  
(ECL Levels)  
The EL89 style drive circuitry produces swings twice  
as large as a standard PECL output. When driving a  
coaxial cable, proper termination is required at both ends  
of the line to minimize reflections. The 1.6V output swings  
allow for proper termination at both ends of the cable.  
Because of the larger output swings, the QT, QT outputs  
are terminated into the thevenin equivalent of 50to  
VCC-3.0V instead of 50to VCC-2.0V.  
Local  
QR  
DR  
Receive Data  
(ECL Levels) QR  
DR  
VBB  
1
0
QT  
QT  
DT  
DT  
Local  
Transmit Data  
(ECL Levels)  
To Output Cable  
(Enhanced Swing)  
SEL (TTL)  
PIN NAMES  
Pin  
DR/DR  
QR/QR  
DT/DT  
QT/QT  
SEL  
Function  
Differential Input from Receive Cable  
Buffered Differential Output from Receive Cable  
Differential Input to Transmit Cable  
Buffered Differential Output to Transmit Cable  
Multiplexer Control Signal (TTL)  
Postive Power Supply  
PIN CONFIGURATION  
16  
1
QR  
V
CC  
VCC  
2
15  
14  
QR  
DR  
GND  
Ground  
3
V
CC  
DR  
VBB  
Reference Voltage Output  
4
5
6
13  
12  
11  
NC  
GND  
Top View  
SOIC  
V
CC  
VBB  
QT  
DT  
TRUTH TABLE  
7
8
10  
9
QT  
DT  
SEL  
Function  
V
CC  
SEL  
L
DR QT  
DT QT  
H
Rev.: C  
Amendment:/2  
Issue Date: January 2000  
1

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