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SY100S322

更新时间： 2024-11-10 22:59:23

品牌	Logo	应用领域
麦瑞 - MICREL		/
页数	文件大小	规格书
5页	97K
描述
9-BIT BUFFER

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中文翻译

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数据手册

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SY100S322 数据手册

SY100S322

9-BIT BUFFER

FEATURES

DESCRIPTION

The SY100S322 is an ultra-fast buffer designed for use

in high-performance ECL systems. The device provides

nine non-inverting buffers with single-ended outputs. The

inputs on the device have 75KΩ pull-down resistors.

■ Max. propagation delay of 700ps

■ IEE min. of –55mA

■ Extended supply voltage option:

VEE = –4.2V to –5.5V

■ Voltage and temperature compensation for

improved noise immunity

PIN CONFIGURATIONS

■ Internal 75KΩ input pull-down resistors

■ 70% faster than Fairchild 300K at lower power

■ Function and pinout compatible with Fairchild F100K

■ Available in 24-pin CERPACK and 28-pin PLCC

11 10 9

8 7 6 5

packages

VEE

VEES

VCCA

VCC

Top View

PLCC

J28-1

BLOCK DIAGRAM

19 20 21 22 23 24 25

24 23 22 21 20 19

Top View

Flatpack

F24-1

VCCA

8 9 10 11 12

PIN NAMES

D1 – D9

O1 – O9

VEES

Function

Data Inputs

Data Outputs

VEE Substrate

VCCA

VCCO for ECL Outputs

Rev.: G

Amendment:/0

Issue Date: July, 1999

12 3 4 5

中文翻译

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