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SY100H603JC PDF预览

SY100H603JC

更新时间: 2024-11-05 22:34:07
品牌 Logo 应用领域
麦瑞 - MICREL 转换器电平转换器驱动程序和接口锁存器接口集成电路
页数 文件大小 规格书
4页 75K
描述
9-BIT LATCHED ECL-TO-TTL

SY100H603JC 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:QCCJ, LDCC28,.5SQReach Compliance Code:not_compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.78Is Samacsys:N
最大延迟:13 ns接口集成电路类型:ECL TO TTL TRANSLATOR
JESD-30 代码:S-PQCC-J28JESD-609代码:e0
长度:11.48 mm湿度敏感等级:1
标称负供电电压:-4.5 V位数:1
功能数量:9端子数量:28
最高工作温度:85 °C最低工作温度:
输出特性:3-STATE输出锁存器或寄存器:LATCH
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:QCCJ封装等效代码:LDCC28,.5SQ
封装形状:SQUARE封装形式:CHIP CARRIER
峰值回流温度(摄氏度):240电源:5,-4.5 V
认证状态:Not Qualified座面最大高度:4.57 mm
子类别:Level Translators最大供电电压:5.5 V
最小供电电压:4.5 V标称供电电压:5 V
表面贴装:YES技术:ECL
温度等级:COMMERCIAL EXTENDED端子面层:Tin/Lead (Sn85Pb15)
端子形式:J BEND端子节距:1.27 mm
端子位置:QUAD处于峰值回流温度下的最长时间:30
宽度:11.48 mmBase Number Matches:1

SY100H603JC 数据手册

 浏览型号SY100H603JC的Datasheet PDF文件第2页浏览型号SY100H603JC的Datasheet PDF文件第3页浏览型号SY100H603JC的Datasheet PDF文件第4页 
9-BIT LATCHED  
ECL-TO-TTL  
SY10H603  
SY100H603  
DESCRIPTION  
FEATURES  
9-bit ideal for byte-parity applications  
3-state TTL outputs  
The SY10/100H603 are 9-bit, dual supply ECL-to-TTL  
translators. Devices in the Micrel-Synergy 9-bit translator  
series utilize the 28-lead PLCC for optimal power pinning,  
signal flow-through and electrical performance.  
The devices feature a 48mA TTL output stage and AC  
performance is specified into both a 50pF and 200pF  
load capacitance. Latching is controlled by Latch Enable  
(LEN) and Master Reset (MR) resets the latches. A HIGH  
on OEECL sends the outputs into the high impedance  
state. All control inputs are ECL level.  
Flow-through configuration  
Extra TTL and ECL power/ground pins to minimize  
switching noise  
Dual supply  
6.0ns max. delay into 50pF, 12ns into 200pF (all  
outputs switching)  
PNP TTL inputs for low loading  
The 10H version is compatible with MECL 10KH ECL  
logic levels. The 100H version is compatible with 100K  
levels.  
Choice of ECL compatibility: MECL 10KH (10Hxxx)  
or 100K (100Hxxx)  
Fully compatible with Motorola MC10H/100H603  
Available in 28-pin PLCC package  
PIN CONFIGURATION  
BLOCK DIAGRAM  
25 24 23 22 21 20 19  
26  
Q4  
Q3  
18  
17  
16  
15  
14  
13  
12  
D8  
OEECL  
27  
28  
1
D7  
D0  
D1  
D2  
D3  
D4  
D5  
D6  
D7  
D8  
D
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
0
1
2
3
4
5
6
7
8
VCCT  
Q2  
VCCE  
D6  
EN  
TOP VIEW  
PLCC  
GND  
Q1  
2
D5  
D
3
D4  
EN  
Q0  
4
D3  
D
5
6
7
8
9
10 11  
EN  
D
EN  
ECL  
D
TTL  
PIN NAMES  
EN  
D
Pin  
GND  
Function  
EN  
TTL Ground (0V)  
D
VCCE  
VCCT  
ECL VCC (0V)  
EN  
TTL Supply (+5.0V)  
ECL Supply (–5.2/–4.5V)  
Data Inputs (ECL)  
Data Outputs (TTL)  
3-state Control (ECL)  
Latch Enable (ECL)  
Master Reset (ECL)  
VEE  
D
D0–D8  
Q0–Q8  
OEECL  
LEN  
EN  
D
EN  
LEN  
MR  
MR  
Rev.: D  
Amendment:/0  
Issue Date: April, 1998  
1

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