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SY100EL05ZCTR PDF预览

SY100EL05ZCTR

更新时间: 2024-11-19 22:07:39
品牌 Logo 应用领域
麦瑞 - MICREL 输入元件
页数 文件大小 规格书
4页 51K
描述
2-INPUT DIFFERENTIAL AND/NAND

SY100EL05ZCTR 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:SOIC包装说明:0.150 INCH, SOIC-8
针数:8Reach Compliance Code:not_compliant
HTS代码:8542.39.00.01风险等级:5.46
系列:100ELJESD-30 代码:R-PDSO-G8
JESD-609代码:e0长度:4.93 mm
逻辑集成电路类型:AND/NAND GATE湿度敏感等级:1
功能数量:1输入次数:2
端子数量:8最高工作温度:85 °C
最低工作温度:输出特性:OPEN-EMITTER
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP8,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE包装方法:TAPE AND REEL
峰值回流温度(摄氏度):240电源:-4.5 V
最大电源电流(ICC):25 mAProp。Delay @ Nom-Sup:0.42 ns
传播延迟(tpd):0.39 ns认证状态:Not Qualified
施密特触发器:NO座面最大高度:1.73 mm
子类别:Gates表面贴装:YES
技术:ECL温度等级:COMMERCIAL EXTENDED
端子面层:Tin/Lead (Sn85Pb15)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:3.94 mm

SY100EL05ZCTR 数据手册

 浏览型号SY100EL05ZCTR的Datasheet PDF文件第2页浏览型号SY100EL05ZCTR的Datasheet PDF文件第3页浏览型号SY100EL05ZCTR的Datasheet PDF文件第4页 
2-INPUT  
DIFFERENTIAL  
AND/NAND  
SY10EL05  
SY100EL05  
FEATURES  
DESCRIPTION  
275ps propagation delay  
The SY10/100EL05 are 2-input differential AND/NAND  
gates. These devices are functionally equivalent to the  
E404 devices, with higher performance capabilities. With  
propagation delays and output transition times  
significantly faster than the E404, the EL05 is ideally  
suited for those applications which require the ultimate  
in AC performance.  
High bandwidth output transitions  
Internal 75Kinput pull-down resistors  
Available in 8-pin SOIC package  
Because a negative 2-input NAND is equivalent to a  
2-input OR function with inverted inputs, the differential  
inputs and outputs of the device allows the EL05 to also  
be used as a 2-input differential OR/NOR gate.  
The differential inputs employ clamp circuitry so that,  
under open conditions (pulled down to VEE), the input to  
the AND gate will be HIGH. In this way, if one set of  
inputs is open, the gate will remain active to the other  
input.  
PIN CONFIGURATION/BLOCK DIAGRAM  
PIN NAMES  
Pin  
D0, D1  
Q
Function  
Data Inputs  
Data Outputs  
1
2
8
7
D0  
D0  
VCC  
Q
3
4
6
5
D1  
D1  
Q
VEE  
SOIC  
TOP VIEW  
Rev.: E  
Amendment:/0  
Issue Date: August, 1998  
1

SY100EL05ZCTR 替代型号

型号 品牌 替代类型 描述 数据表
MC100EL05DR2G ONSEMI

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2-Input Differential AND/NAND
MC100LVEL05DR2G ONSEMI

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3.3V ECL 2-Input Differential AND/NAND

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