Datasheet > SY100E445JZ-TR

SY100E445JZ-TR

更新时间： 2024-11-20 22:58:47

品牌	Logo	应用领域
美国微芯 - MICROCHIP		/
页数	文件大小	规格书
8页	81K
描述
IC CONV 4BIT SER/PAR 28-PLCC

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SY100E445JZ-TR 数据手册

SY10E445

Micrel, Inc.

SY100E445

4-BIT SERIAL-to-PARALLEL

CONVERTER

SY10E445

SY100E445

FEATURES

DESCRIPTION

■ On-chip clock ÷4 and ÷8

The SY10/100E445 are integrated 4-bit serial-to-parallel

data converters. The devices are designed to operate for

NRZ data rates of up to 2.5Gb/s. The chip generates a

divide-by-4 and a divide-by-8 clock for both 4-bit conversion

and a two-chip 8-bit conversion function. The conversion

sequence was chosen to convert the first serial bit to Q0,

the second to Q1, etc.

Two selectable serial inputs provide a loopback capability

for testing purposes when the device is used in conjunction

with the E446 parallel-to-serial converter.

The start bit for conversion can be moved using the

SYNC input. A single pulse, applied asynchronously for at

least two input clock cycles, shifts the start bit for conversion

from Qn to Qn-1 by one bit. For each additional shift required,

an additional pulse must be applied to the SYNC input.

Asserting the SYNC input will force the internal clock dividers

to "swallow" a clock pulse, effectively shifting a bit from the

Qn to the Qn-1 output (see Timing Diagram B).

The MODE input is used to select the conversion mode

of the device. With the MODE input LOW (or open) the

device will function as a 4-bit converter. When the mode

input is driven HIGH, the data on the output will change on

every eighth clock cycle, thus allowing for an 8-bit conversion

scheme using two E445s. When cascaded in an 8-bit

conversion scheme, the devices will not operate at the

2.5Gb/s data rate of a single device. Refer to the applications

section of this data sheet for more information on cascading

the E445.

■ Extended 100E VEE range of –4.2V to –5.5V

■ 2.5Gb/s data rate capability

■ Differential clock and serial inputs

■ VBB output for single-ended use

■ Asynchronous data synchronization

■ Mode select to expand to 8 bits

■ Internal 75kΩ input pull-down resistors

■ Fully compatible with Motorola MC10E/100E445

■ Available in 28-pin PLCC package

PIN NAMES

SINA, SINA

SINB, SINB

SEL

Function

Differential Serial Data Input A

Differential Serial Data Input B

Serial Input Select Pin

SOUT, SOUT

Q0–Q3

Differential Serial Data Output

Parallel Data Outputs

CLK, CLK

CL/4, CL/4

CL/8, CL/8

MODE

Differential Clock Inputs

Differential ÷4 Clock Output

Differential ÷8 Clock Output

Conversion Mode 4-bit/8-bit

Conversion Synchronizing Input

Input, Resets the Counters

VCC to Output

For lower data rate applications, a VBB reference voltage

is supplied for single-ended inputs. When operating at clock

rates above 500MHz, differential input signals are

recommended. For single-ended inputs, the VBB pin is tied

to the inverting differential input and bypassed via a 0.01µF

capacitor. The VBB provides the switching reference for the

input differential amplifier. The VBB can also be used to AC

couple an input signal.

SYNC

RESET

VCCO

Rev.: F

Amendment:/0

M9999-032206

hbwhelp@micrel.com or (408) 955-1690

Issue Date: March 2006

12 3 4 5 6 7 8

中文翻译

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与SY100E445JZ-TR相关器件

型号	品牌	获取价格	描述	数据表
SY100E446	MICREL	获取价格	4-BIT PARALLEL-TO-SERIAL CONVERTER
SY100E446JC	MICREL	获取价格	4-BIT PARALLEL-TO-SERIAL CONVERTER
SY100E446JCTR	MICREL	获取价格	4-BIT PARALLEL-TO-SERIAL CONVERTER
SY100E446JCTR	MICROCHIP	获取价格	Parallel In Serial Out, 100E Series, 4-Bit, Right Direction, Complementary Output, ECL, PQ
SY100E446JZ	MICREL	获取价格	4-BIT PARALLEL-TO-SERIAL CONVERTER
SY100E446JZTR	MICREL	获取价格	4-BIT PARALLEL-TO-SERIAL CONVERTER
SY100E446JZTR	MICROCHIP	获取价格	Parallel In Serial Out, 100E Series, 4-Bit, Right Direction, Complementary Output, ECL, PQ
SY100E451	MICREL	获取价格	6-BIT REGISTER DIFFERENTIAL DATA CLOCK
SY100E451JC	MICREL	获取价格	6-BIT REGISTER DIFFERENTIAL DATA CLOCK
SY100E451JC	MICROCHIP	获取价格	D Flip-Flop, 100E Series, 1-Func, Positive Edge Triggered, 6-Bit, True Output, ECL, PQCC28

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