SY100E122JYTR

更新时间： 2024-11-26 03:46:31

阅读下载

中文翻译

获取价格

如果您发现信息不准确，欢迎纠错

SY100E122JYTR 数据手册

SY10E122

SY100E122

Micrel, Inc.

9-BIT

SY10E122

SY100E122

BUFFER

FEATURES

DESCRIPTION

■ 500ps max. propagation delay

The SY10/100E122 are 9-bit buffers designed for use in

new, high-performance ECL systems. The E122 provides

nine non-inverting buffers.

■ Extended 100E VEE range of –4.2V to –5.5V

■ Fully compatible with industry standard 10KH,

100K I/O levels

■ Internal 75KΩ input pulldown resistors

■ Fully compatible with Motorola MC10E/100E122

■ Available in 28-pin PLCC package

PIN NAMES

BLOCK DIAGRAM

D0-D8

Q0-Q8

VCCO

Function

Data Inputs

Data Outputs

VCC to Output

Rev.: G

Amendment: /0

M9999-032006

hbwhelp@micrel.com or (408) 955-1690

Issue Date: March 2006

12 3 4

中文翻译

下载PDF

型号	品牌	获取价格	描述	数据表
SY100E122JY-TR	MICROCHIP	获取价格	100E SERIES, 9 1-INPUT NON-INVERT GATE, PQCC28
SY100E131	MICREL	获取价格	4-BIT D FLIP-FLOP
SY100E131JC	MICROCHIP	获取价格	D Flip-Flop, 100E Series, 2-Func, Positive Edge Triggered, 2-Bit, Complementary Output, EC
SY100E131JC	MICREL	获取价格	4-BIT D FLIP-FLOP
SY100E131JCTR	MICREL	获取价格	4-BIT D FLIP-FLOP
SY100E131JI	MICREL	获取价格	4-BIT D FLIP-FLOP
SY100E131JITR	MICREL	获取价格	4-BIT D FLIP-FLOP
SY100E131JY	MICROCHIP	获取价格	100E SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PQCC28
SY100E131JY	MICREL	获取价格	4-BIT D FLIP-FLOP
SY100E131JYTR	MICREL	获取价格	4-BIT D FLIP-FLOP