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SX28AD100-I/DP

更新时间： 2024-11-27 22:24:19
品牌 Logo 应用领域
其他 - ETC 闪存存储通信控制器
页数 文件大小 规格书
52页 337K
描述
Configurable Communications Controllers with EE/Flash Program Memory, In-System Programming Capability and On-Chip Debug

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SX28AD100-I/DP 数据手册

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January 19, 2000  
SX18AC/SX20AC/SX28AC/SX18AC75/SX20AC75/SX28AC75  
Configurable Communications Controllers with EE/Flash Program  
Memory, In-System Programming Capability and On-Chip Debug  
1.0 PRODUCT OVERVIEW  
teristics enables the device to implement hard real-time  
functions as software modules (Virtual Peripheral™) to  
replace traditional hardware functions.  
1.1 Introduction  
The Scenix SX family of configurable communications  
controllers are fabricated in an advanced CMOS process  
technology. The advanced process, combined with a  
RISC-based architecture, allows high-speed computa-  
tion, flexible I/O control, and efficient data manipulation.  
Throughput is enhanced by operating the device at fre-  
quencies up to 50/75 MHz and by optimizing the instruc-  
tion set to include mostly single-cycle instructions. In  
addition, the SX architecture is deterministic and totally  
reprogramable. The unique combination of these charac-  
On-chip functions include a general-purpose 8-bit timer  
with prescaler, an analog comparator, a brown-out detec-  
tor, a watchdog timer, a power-save mode with multi-  
source wakeup capability, an internal R/C oscillator, user-  
selectable clock modes, and high-current outputs.  
RTCC  
OSC1  
OSC2  
OSC  
8-bit Watchdog  
Tim er (W DT)  
8-bit Tim er  
RTCC  
Driver  
Clock  
Select  
4M Hz  
Internal  
RC OSC  
÷
4 or 1  
÷
Interrupt Stack  
8
System Clock  
M CLR  
Prescaler for RTCC  
or  
Prescaler for W DT  
Power-On  
Reset  
Analog  
Comp  
3
Interrupt  
RESET  
MIW U  
8
Port B  
8
Brown-Out  
8
System  
Clock  
MIW U  
Internal Data Bus  
8
8
8
8
8
8
8
8
W
In-System  
PC  
3 Level  
Stack  
Debugging  
Port A  
4
8
Port C  
8
ALU  
FSR  
PC  
Address  
Fetch  
In-System  
Programm ing  
Instruction  
Pipeline  
Decode  
136 Bytes  
SRAM  
STATUS  
OPTION  
M ODE  
Executive  
2k Words  
EEPROM  
Address  
12  
Write Back  
W rite Data  
Read Data  
Instruction  
8
8
12  
IREAD  
Figure 1-1. Block Diagram  
Scenix™ and the Scenix logo are trademarks of Scenix Semiconductor, Inc.  
I2C™ is a trademark of Philips Corporation  
All other trademarks mentioned in this document are property of their respec-  
tive companies.  
Microwire™ is a trademark of National Semiconductor Corporation  
© 2000 Scenix Semiconductor, Inc. All rights reserved.  
- 1 -  
www.scenix.com  
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