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STV8130AD PDF预览

STV8130AD

更新时间: 2024-09-22 21:55:23
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 稳压器
页数 文件大小 规格书
12页 138K
描述
ADJUSTABLE AND +3.3 V DUAL VOLTAGE REGULATOR WITH DISABLE AND RESET FUNCTIONS

STV8130AD 技术参数

生命周期:Active零件包装代码:SIP
包装说明:0.300 INCH, ROHS COMPLIANT, PLASTIC, SIP-9针数:9
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.2
可调性:FIXED/ADJUSTABLE标称回动电压 1:1.4 V
最大绝对输入电压:20 VJESD-30 代码:R-PDIP-T16
长度:19.18 mm最大电网调整率:0.1%
最大电网调整率 (%/V):0.68最大负载调整率:0.2%
最大负载调整率 (%):8%功能数量:1
输出次数:2端子数量:16
工作温度TJ-Max:150 °C工作温度TJ-Min:
最大输出电流 1:0.75 A最大输出电流 2:0.75 A
最大输出电压 1:3.37 V最小输出电压 1:3.23 V
标称输出电压 1:3.3 V最大输出电压 2:16 V
最小输出电压 2:2.8 V封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装等效代码:DIP16,.3
封装形状:RECTANGULAR封装形式:IN-LINE
认证状态:Not Qualified调节器类型:FIXED/ADJUSTABLE POSITIVE MULTIPLE OUTPUT STANDARD REGULATOR
座面最大高度:5.33 mm子类别:Other Regulators
表面贴装:NO技术:BIPOLAR
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL最大电压容差:2.12%
宽度:7.62 mmBase Number Matches:1

STV8130AD 数据手册

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®
STV8130AD  
ADJUSTABLE AND +3.3 V DUAL VOLTAGE REGULATOR  
WITH DISABLE AND RESET FUNCTIONS  
PRELIMINARY DATA  
FEATURES  
Input Voltage Range: 5 V to 18 V  
Output Currents up to 750 mA  
Fixed Precision Output 1 Voltage: 3.3 V ±2%  
Adjustable Output 2 Voltage: 2.8 to 16 V  
Output 1 with Reset Function  
Output 2 with Disable Function by TTL Input  
Short-circuit Protection at both Outputs  
Thermal Protection  
SIP9 (Plastic Package)  
ORDER CODE: STV8130A#  
Low Dropout Voltage  
DESCRIPTION  
The STV8130A# and STV8130D# are monolithic  
dual positive voltage regulators designed to provide  
a fixed precision output voltage of 3.3 V and an  
adjustable voltage between 2.8 and 16 V for  
currents up to 750 mA.  
An internal reset circuit generates a reset pulse  
when the voltage of Output 1 drops below the  
regulated voltage value.  
DIP16 (8 + 8)  
ORDER CODE: STV8130D#  
Output 2 can be disabled via the TTL input.  
Short-circuit and thermal protections are included.  
INPUT1  
GROUND  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
9
8
7
6
5
4
3
2
1
OUTPUT1  
OUTPUT2  
PROGRAM  
RESET  
GROUND  
DISABLE  
INPUT2  
DELAY CAPACITOR  
DISABLE  
GROUND  
GROUND  
GROUND  
GROUND  
GROUND  
RESET  
DELAY CAPACITOR  
INPUT2  
INPUT1  
PROGRAM  
OUTPUT2  
OUTPUT1  
GROUND  
GROUND  
10  
9
Tab is connected to GROUND  
September 2003  
1/12  
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.  

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