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STPMIC1BPQR

更新时间: 2024-11-29 02:50:15
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS /
页数 文件大小 规格书
140页 8810K
描述
Highly integrated power management IC for micro processor units

STPMIC1BPQR 技术参数

生命周期:ActiveReach Compliance Code:compliant
Factory Lead Time:18 weeks风险等级:2.05
模拟集成电路 - 其他类型:POWER SUPPLY MANAGEMENT CIRCUITBase Number Matches:1

STPMIC1BPQR 数据手册

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STPMIC1  
Datasheet  
Highly integrated power management IC for micro processor units  
Features  
Input voltage range from 2.8 V to 5.5 V  
4 adjustable general purpose LDOs  
1 LDO for DDR3 termination (sink-source), bypass mode for low power DDR or  
as general purpose LDO  
1 LDO for USB PHY supply with automatic power source detection  
1 reference voltage LDO for DDR memory  
4 adjustable adaptive constant on-time (COT) buck SMPS converters  
5.2 V / 1.1 A boost SMPS with bypass mode for 5 V input or battery input  
1 power switch 500 mA USB OTG compliant  
1 power switch 500 mA/1000 mA general purpose  
User programmable non-volatile memory (NVM), enabling scalability to support  
a wide range of applications  
I²C and digital IO control interface  
WFQFN 44L (5x6x0.8)  
Applications  
Power management for embedded micro processor units  
Wearable and IoT  
Portable devices  
Man-machine interfaces  
Product status link  
Smart home  
STPMIC1  
Power management unit companion chip of the STM32MP1 MPU  
Device summary  
Description  
STPMIC1APQR  
The STPMIC1 is a fully integrated power management IC designed for products  
based on high integrated application processor designs requiring low power and high  
efficiency.  
STPMIC1BPQR  
STPMIC1CPQR  
STPMIC1DPQR  
STPMIC1EPQR  
Order code  
Packing  
The device integrates advanced low power features controlled by a host processor  
via I²C and IO interface.  
The STPMIC1 regulators are designed to supply power to the application processor  
as well as to the external system peripherals such as: DDR, Flash memories and  
other system devices.  
WFQFN 44L  
(5x6x0.8)  
The boost converter can power up to 3 USB ports (two 500 mA host USB and one  
100 mA USB OTG). Its advanced bypass architecture allows the smooth regulation  
of VBUS for USB ports from a battery as well as low-cost consumer 5 V AC-DC  
adapters.  
4 buck SMPS are optimized to provide an excellent transient response and an output  
voltage precision for a wide range of operating conditions, high full range efficiency (η  
up to 90%) by implementing a low power mode with a smooth transition from PFM to  
PWM and also an advanced PWM synchronization technique with an integrated PLL  
for a better noise (EMI performance).  
DS12792 - Rev 7 - December 2020  
For further information contact your local STMicroelectronics sales office.  
www.st.com  

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