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STPIC44L02PTR PDF预览

STPIC44L02PTR

更新时间： 2024-11-28 13:14:07
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 驱动器
页数 文件大小 规格书
21页 440K
描述
BUF OR INV BASED MOSFET DRIVER, PDSO24, SSOP-24

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中文翻译

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STPIC44L02PTR 技术参数

是否Rohs认证： 符合生命周期：Obsolete
零件包装代码：SSOP包装说明：SSOP-24
针数：24Reach Compliance Code：compliant
ECCN代码：EAR99HTS代码：8542.39.00.01
风险等级：5.83驱动器位数：4
高边驱动器：YES接口集成电路类型：BUFFER OR INVERTER BASED MOSFET DRIVER
JESD-30 代码：R-PDSO-G24JESD-609代码：e4
长度：8.85 mm功能数量：1
端子数量：24最高工作温度：125 °C
最低工作温度：-40 °C最大输出电流：0.0025 A
封装主体材料：PLASTIC/EPOXY封装代码：SSOP
封装等效代码：SSOP24,.24封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, SHRINK PITCH峰值回流温度（摄氏度）：NOT SPECIFIED
电源：5 V认证状态：Not Qualified
座面最大高度：2 mm子类别：Peripheral Drivers
最大供电电压：5.5 V最小供电电压：4.5 V
标称供电电压：5 V电源电压1-最大：24 V
电源电压1-分钟：8 V电源电压1-Nom：12 V
表面贴装：YES温度等级：AUTOMOTIVE
端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)端子形式：GULL WING
端子节距：0.65 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：6.1 mm
Base Number Matches：1

STPIC44L02PTR 数据手册

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STPIC44L02  
4 CHANNEL SERIAL AND PARALLEL  
LOW SIDE PRE-FET DRIVER  
■
4-CHANNEL SERIAL-IN PARALLEL-IN LOW  
SIDE PRE-FET DRIVER  
■
■
DEVICES ARE CASCADABLE  
INTERNAL 55V INDUCTIVE LOAD CLAMP  
AND VGS PROTECTION CLAMP FOR  
EXTERNAL POWER FETS  
■
INDEPENDENT SHORTED-LOAD AND  
SHORT-TO-BATTERY FAULT DETECTION  
ON ALL GATE TERMINALS  
SOP  
■
■
■
INDEPENDENT OFF-STATE OPEN-LOAD  
FAULT SENSE  
OVER-BATTERY-VOLTAGE LOCKOUT  
PROTECTION AND FAULT REPORTING  
UNDER-BATTERY VOLTAGE LOCKOUT  
PROTECTION  
ASYNCRONOUS OPEN-GATE FAULT FLAG  
DEVICE OUTPUT CAN BE WIRED OR WITH  
MULTIPLE DEVICES  
FAULT STATUS RETURNED THROUGH  
SERIAL OUTPUT TERMINAL  
INTERNAL GLOBAL POWER-ON RESET OF  
DEVICE AND EXTERNAL RESET TERMINAL  
HIGH IMPEDANCE CMOS COMPATIBLE  
INPUTS WITH HYSTERESIS  
TRANSITION FROM THE GATE OUTPUT TO  
A LOW DUTY CYCLE PWM MODE WHEN A  
SHORTED LOAD FAULT OCCURS  
either interface enables the respective channels  
gate output to the external FET. The serial  
interface is recommended when the number of  
signals between the control device and the  
predriver are minimized and the speed of  
operation is not critical. In applications where the  
predriver must respond very quickly or  
asynchronously, the parallel input interface is  
recommended.  
■
■
■
■
■
■
For serial operation, the control device must  
transitate CS from high to low to activate the serial  
input interface. When this occurs, SDO, is  
enabled, fault data is latched into the serial  
interface, and the fault flag is refreshed. Data is  
clocked into the serial registers on low to high  
transitions of SCLK through SDI. Each string of  
data must consist of at least four bits of data. In  
applications where multiple devices are cascaded  
together, the string of data must consist of four bits  
for each device. A high data bit turns the  
respective output channel on and a low data bit  
turns it off. Fault data for the device is clocked out  
of SDO as serial input data is clocked into the  
device. Fault data consists of fault flags for  
shorted load and open load flags (bits 0-3) for  
each of the four output channels. Fault register  
bits are set or cleared asynchronously to reflect  
the current state of the hardware. A fault must be  
present when CS is transitated from high to low to  
be captured and reported in the serial fault data.  
New faults cannot be captured in the serial  
register when CS is low. CS must be transitated  
high after all of the serial data has been clocked  
into the device. A low to high transition of CS  
transfers the last four bits of serial data to the  
DESCRIPTION  
The STPIC44L02 is a low-side predriver that  
provides serial and parallel input interfaces to  
control four external FET power switches.  
It is mainly designed to provide low-frequency  
switching, inductive load applications such as  
solenoids and relays. Fault status is available in a  
serial-data format. Each driver channel has  
independent off-state open-load detection and  
on-state shorted load short to battery detection.  
The STPIC44L02 offers a battery over voltage and  
undervoltage detection and shutdown. If a fault  
occurs while using the STPIC44L02, the channel  
transitates into a low duty cycle, pulse width  
modulated (PWM) signal as long as the fault is  
present.  
These devices provide control of output channels  
through a serial input interface or a parallel input  
interface. A command to enable the output from  
July 2003  
1/21  
1234567...21

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