Datasheet > STP80N06-10

STP80N06-10

更新时间： 2024-02-18 22:07:21

品牌	Logo	应用领域
意法半导体 - STMICROELECTRONICS		晶体晶体管
页数	文件大小	规格书
5页	79K
描述
N - CHANNEL ENHANCEMENT MODE ULTRA HIGH DENSITY POWER MOS TRANSISTOR

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STP80N06-10 数据手册

STP80N06-10

N - CHANNEL ENHANCEMENT MODE

"ULTRA HIGH DENSITY" POWER MOS TRANSISTOR

PRELIMINARY DATA

TYPE

V_DSS

R_DS(on)

I_D

STP80N06-10

60 V

< 0.010 Ω

80 A

■

TYPICAL R_DS(on)= 8.5 mΩ

AVALANCHE RUGGED TECHNOLOGY

100% AVALANCE TESTED

HIGH CURRENT CAPABILITY

175 ^oC OPERATING TEMPERATURE

HIGH dV/dt RUGGEDNESS

APPLICATION ORIENTED

CHARACTERIZATION

TO-220

APPLICATIONS

■

HIGH CURRENT, HIGH SPEED SWITCHING

PWM MOTOR CONTROL

DC-DC & DC-AC CONVERTER

SYNCROUNOUS RECTIFICATION

INTERNAL SCHEMATIC DIAGRAM

ABSOLUTE MAXIMUM RATINGS

Symbol

V_DS

Parameter

Value

Unit

Drain-source Voltage (V_GS= 0)

Drain- gate Voltage (R_GS= 20 kΩ)

Gate-source Voltage

V_DGR

V_GS

± 20

I_D

Drain Current (continuous) at T_c= 25 C

I_D

Drain Current (continuous) at T_c= 100 C

I_DM(•)

P_tot

Drain Current (pulsed)

320

Total Dissipation at T_c= 25 C

150

Derating Factor

W/^oC

V/ns

^oC

dV/dt(¹) Peak Diode Recovery voltage slope

T_stg

Storage Temperature

-65 to 175

175

T_j

Max. Operating Junction Temperature

(•) Pulse width limited by safe operating area

1/5

March 1996

12 3 4 5

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