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STM8S103F2T6C

更新时间: 2024-11-10 10:17:19
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS /
页数 文件大小 规格书
117页 1195K
描述
MICROCONTROLLER

STM8S103F2T6C 数据手册

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STM8S103K3 STM8S103F3 STM8S103F2  
Access line, 16 MHz STM8S 8-bit MCU, up to 8 Kbytes Flash, data  
EEPROM,10-bit ADC, 3 timers, UART, SPI, I²C  
Interrupt management  
Nested interrupt controller with 32 interrupts  
Up to 27 external interrupts on 6 vectors  
UFQFPN32 5x5  
SDIP32 400 mils  
LQFP32 7x7  
Timers  
Advanced control timer: 16-bit, 4 CAPCOM  
channels, 3 complementary outputs, dead-time  
insertion and flexible synchronization  
16-bit general purpose timer, with 3 CAPCOM  
channels (IC, OC or PWM)  
TSSOP20  
SO20W 300 mils  
UFQFPN20 3x3  
8-bit basic timer with 8-bit prescaler  
Auto wake-up timer  
Features  
Core  
Window watchdog and independent watchdog  
timers  
16 MHz advanced STM8 core with Harvard  
architecture and 3-stage pipeline  
Communications interfaces  
Extended instruction set  
UART with clock output for synchronous  
operation, Smartcard, IrDA, LIN master mode  
Memories  
SPI interface up to 8 Mbit/s  
I2C interface up to 400 Kbit/s  
Program memory: 8 Kbytes Flash; data retention  
20 years at 55 °C after 10 kcycles  
Data memory: 640 bytes true data EEPROM;  
endurance 300 kcycles  
Analog to digital converter (ADC)  
10-bit, ±1 LSB ADC with up to 5 multiplexed  
channels, scan mode and analog watchdog  
RAM: 1 Kbytes  
Clock, reset and supply management  
I/Os  
2.95 to 5.5 V operating voltage  
Up to 28 I/Os on a 32-pin package including 21  
high sink outputs  
Flexible clock control, 4 master clock sources:  
Low power crystal resonator oscillator  
-
Highly robust I/O design, immune against current  
injection  
External clock input  
-
Internal, user-trimmable 16 MHz RC  
-
Development support  
Internal low power 128 kHz RC  
-
Embedded single wire interface module (SWIM)  
for fast on-chip programming and non intrusive  
debugging  
Clock security system with clock monitor  
Power management:  
Unique ID  
Low power modes (wait, active-halt, halt)  
-
96-bit unique key for each device  
Switch-off peripheral clocks individually  
-
Permanently active, low consumption power-on  
and power-down reset  
June 2012  
1/117  
DocID15441 Rev 9  
www.st.com  

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