STM8AF6x26/4x/66/68
Automotive 8-bit MCU, with up to 32 Kbytes Flash, data EEPROM,
10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V
Datasheet - production data
Features
Core
LQFP48 7x7 mm
LQFP32 7x7 mm
– Max f
: 16 MHz
CPU
– Advanced STM8A core with Harvard
architecture and 3-stage pipeline
– Average 1.6 cycles/instruction resulting in
VFQFPN32 5x5 mm
10 MIPS at 16 MHz f
standard benchmark
for industry
CPU
– Window and independent watchdog timers
Communication interfaces
Memories
– LINUART
– Flash Program memory: 16 to 32 Kbytes
Flash; data retention 20 years at 55 °C
after 1 kcycle
– LIN 2.1 compliant, master/slave modes
with automatic resynchronization
– SPI interface up to 8 Mbit/s or f
/2
– Data memory: 0.5 to 1 Kbyte true data
EEPROM; endurance 300 kcycles
MASTER
2
– I C interface up to 400 Kbit/s
– RAM: 1 to 2 Kbytes
Analog-to-digital converter (ADC)
Clock management
– 10-bit accuracy, 2LSB TUE accuracy, 2LSB
TUE linearity ADC and up to 10 multiplexed
channels with individual data buffer
– Low-power crystal resonator oscillator with
external clock input
– Analog watchdog, scan and continuous
sampling mode
– Internal, user-trimmable 16 MHz RC and
low-power 128 kHz RC oscillators
– Clock security system with clock monitor
I/Os
– Up to 38 user pins including 10 HS I/Os
Reset and supply management
– Wait/auto-wakeup/Halt low-power modes
with user definable clock gating
– Highly robust I/O design, immune against
current injection
– Low consumption power-on and power-
down reset
Operating temperature up to 150 °C
Qualification conforms to AEC-Q100 rev G
Interrupt management
(1)
Table 1. Device summary
– Nested interrupt controller with 32 vectors
– Up to 34 external interrupts on 5 vectors
Reference
Part number
STM8AF624x
STM8AF626x
STM8AF6246, STM8AF6248
STM8AF6266, STM8AF6268
Timers
– Up to 2 general purpose 16-bit PWM timers
with up to 3 CAPCOM channels each (IC,
OC or PWM)
STM8AF6126(3), STM8AF6146(2)
STM8AF6148(3)
,
STM8AF612x/4x
STM8AF616x
STM8AF6166(2), STM8AF6168(3)
– Advanced control timer: 16-bit, 4 CAPCOM
channels, 3 complementary outputs, dead-
time insertion and flexible synchronization
1. In the order code, ‘F’ applies to devices with Flash program
memory and data EEPROM while ‘H’ refers to devices with
Flash program memory only. ‘F’ is replaced by ‘P’ for devices
with FASTROM (see Tables 2 and 3, and Figure 47).
– 8-bit AR basic timer with 8-bit prescaler
– Auto-wakeup timer
2. Not recommended for new design
3. Obsolete products.
November 2014
DocID14952 Rev 9
1/91
This is information on a product in full production.
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