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STM8AF5178TAU PDF预览

STM8AF5178TAU

更新时间: 2024-11-03 09:11:27
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 时钟外围集成电路装置
页数 文件大小 规格书
110页 1617K
描述
8-BIT, FLASH, 24MHz, MICROCONTROLLER, PQFP48, 7 X 7 MM, ROHS COMPLIANT, LQFP-48

STM8AF5178TAU 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:QFP
包装说明:LQFP-48针数:48
Reach Compliance Code:compliantHTS代码:8542.31.00.01
风险等级:5.84具有ADC:YES
位大小:8边界扫描:NO
CPU系列:STM8最大时钟频率:24 MHz
DAC 通道:NODMA 通道:NO
格式:FIXED POINT集成缓存:NO
JESD-30 代码:S-PQFP-G48JESD-609代码:e3
长度:7 mm低功率模式:YES
湿度敏感等级:3外部中断装置数量:37
I/O 线路数量:40端子数量:48
片上数据RAM宽度:8片上程序ROM宽度:8
最高工作温度:85 °C最低工作温度:-40 °C
PWM 通道:YES封装主体材料:PLASTIC/EPOXY
封装代码:LFQFP封装等效代码:QFP48,.35SQ,20
封装形状:SQUARE封装形式:FLATPACK, LOW PROFILE, FINE PITCH
认证状态:Not QualifiedRAM(字节):3072
RAM(字数):3072ROM(单词):49152
ROM可编程性:FLASH座面最大高度:1.6 mm
速度:24 MHz最大供电电压:5.5 V
最小供电电压:3 V标称供电电压:3.3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Tin (Sn)
端子形式:GULL WING端子节距:0.5 mm
端子位置:QUAD宽度:7 mm
uPs/uCs/外围集成电路类型:MICROCONTROLLER

STM8AF5178TAU 数据手册

 浏览型号STM8AF5178TAU的Datasheet PDF文件第2页浏览型号STM8AF5178TAU的Datasheet PDF文件第3页浏览型号STM8AF5178TAU的Datasheet PDF文件第4页浏览型号STM8AF5178TAU的Datasheet PDF文件第5页浏览型号STM8AF5178TAU的Datasheet PDF文件第6页浏览型号STM8AF5178TAU的Datasheet PDF文件第7页 
STM8AF5xxx STM8AF6x69/7x/8x/9x/Ax  
Automotive 8-bit MCU, with up to 128 Kbytes Flash, data EEPROM,  
10-bit ADC, timers, LIN, CAN, USART, SPI, I2C, 3 to 5.5 V  
Datasheet production data  
Features  
Core  
– Max f  
: 24 MHz  
CPU  
LQFP48 7x7  
LQFP64 10x10  
LQFP80 14x14  
– Advanced STM8A core with Harvard  
architecture and 3-stage pipeline  
– Average 1.6 cycles/instruction resulting in  
10 MIPS at 16 MHz f  
standard benchmark  
for industry  
CPU  
LQFP32 7x7  
VFQFPN32 5x5  
Communication interfaces  
Memories  
– High speed 1 Mbit/s CAN 2.0B interface  
– USART with clock output for synchronous  
operation - LIN master mode  
– LINUART LIN 2.1 compliant, master/slave  
modes with automatic resynchronization  
– Program memory: 32 to 128 Kbytes Flash  
program; data retention 20 years at 55 °C  
– Data memory: up to 2 Kbytes true data  
EEPROM; endurance 300 kcycles  
– RAM: 2 Kbytes to 6 Kbytes  
– SPI interface up to 10 Mbit/s or f  
– I C interface up to 400 Kbit/s  
/2  
MASTER  
2
Clock management  
– Low-power crystal resonator oscillator with  
external clock input  
– Internal, user-trimmable 16 MHz RC and  
low-power 128 kHz RC oscillators  
– Clock security system with clock monitor  
Analog to digital converter (ADC)  
– 10-bit resolution, 2 LSB TUE, 1 LSB  
linearity and up to 16 multiplexed channels  
Operating temperature up to 150 °C  
Qualification conforms to AEC-Q100 rev G  
Reset and supply management  
– Wait/auto-wakeup/Halt low-power modes  
with user definable clock gating  
– Low consumption power-on and power-  
down reset  
(1)  
Table 1.  
Device summary  
Part numbers: STM8AF52xx (with CAN)  
STM8AF52AA, STM8AF52A9, STM8AF52A8, STM8AF528A,  
STM8AF5289, STM8AF5288, STM8AF5269, STM8AF5268  
Interrupt management  
Part numbers: STM8AF6269/8x/Ax  
– Nested interrupt controller with 32 vectors  
– Up to 37 external interrupts on 5 vectors  
STM8AF62AA, STM8AF62A9, STM8AF62A8, STM8AF628A,  
STM8AF6289, STM8AF6288, STM8AF6286, STM8AF6269,  
STM8AF62A6,  
Timers  
Part numbers: STM8AF51xx (with CAN)(2)  
– 2 general purpose 16-bit timers with up to 3  
CAPCOM channels each (IC, OC, PWM)  
– Advanced control timer: 16-bit, 4 CAPCOM  
channels, 3 complementary outputs, dead-  
time insertion and flexible synchronization  
– 8-bit AR basic timer with 8-bit prescaler  
– Auto-wakeup timer  
STM8AF51AA, STM8AF51A9, STM8AF51A8, STM8AF519A,  
STM8AF5199, STM8AF5198, STM8AF518A, STM8AF5189,  
STM8AF5188, STM8AF5179, STM8AF5178, STM8AF5169,  
STM8AF5168  
(2)  
Part numbers: STM8AF6169/7x/8x/9x/Ax  
STM8AF61AA, STM8AF61A9, STM8AF61A8, STM8AF619A,  
STM8AF6199, STM8AF6198, STM8AF618A, STM8AF6189,  
STM8AF6188, STM8AF6186, STM8AF6179, STM8AF6178,  
STM8AF6176, STM8AF6169  
– Window and independent watchdog timers  
I/Os  
1. In the order code, ‘F’ applies to devices with Flash program  
memory and data EEPROM while ‘H’ refers to devices with  
Flash program memory only. ‘F’ is replaced by ‘P’ for devices  
with FASTROM (see Tables 2, 3, 4, and 5, and Figure 52).  
– Up to 68 user pins (11 high sink I/Os)  
– Highly robust I/O design, immune against  
current injection  
2. Not recommended for new design.  
July 2012  
Doc ID 14395 Rev 9  
1/110  
This is information on a product in full production.  
www.st.com  
1
 
 
 
 
 
 
 
 
 
 
 

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