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STM32L4R5ZIY6SXXX

更新时间： 2025-07-24 02:12:03
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意法半导体 - STMICROELECTRONICS 静态存储器
页数 文件大小 规格书
307页 5991K
描述
Ultra-low-power Arm® Cortex®-M4 32-bit MCUFPU, 150DMIPS, up to 2MB Flash, 640KB SRAM, LCD-TFT & MIPI DSI, ext. SMPS

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STM32L4R5ZIY6SXXX 数据手册

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STM32L4R5xx STM32L4R7xx  
STM32L4R9xx  
Ultra-low-power Arm® Cortex®-M4 32-bit MCU+FPU, 150DMIPS,  
up to 2MB Flash, 640KB SRAM, LCD-TFT & MIPI DSI, ext. SMPS  
Datasheet- production data  
Features  
• Ultra-low-power with FlexPowerControl  
– 1.71 V to 3.6 V power supply  
LQFP144 (20 × 20)  
LQFP100 (14 x 14)  
UFBGA169 (7 x 7)  
UFBGA144 (10 x 10)  
UFBGA132 (7 × 7)  
WLCSP144  
– -40 °C to 85/125 °C temperature range  
– Batch acquisition mode (BAM)  
– 305 nA in VBAT mode: supply for RTC and  
32x32-bit backup registers  
– Internal multispeed 100 kHz to 48 MHz  
oscillator, auto-trimmed by LSE (better than  
±0.25 % accuracy)  
– 33 nA Shutdown mode (5 wakeup pins)  
– 125 nA Standby mode (5 wakeup pins)  
– 420 nA Standby mode with RTC  
– 2.8 μA Stop 2 with RTC  
– Internal 48 MHz with clock recovery  
– 3 PLLs for system clock, USB, audio, ADC  
• RTC with HW calendar, alarms and calibration  
– 110 μA/MHz Run mode (LDO mode)  
• Up to 24 capacitive sensing channels: support  
– 43 μA/MHz Run mode (@ 3.3 V SMPS  
mode)  
touchkey, linear and rotary touch sensors  
• Advanced graphics features  
– 5 µs wakeup from Stop mode  
– Chrom-ART Accelerator (DMA2D) for  
enhanced graphic content creation  
– Brownout reset (BOR) in all modes except  
shutdown  
– Chrom-GRC (GFXMMU) allowing up to  
20% of graphic resources optimization  
– Interconnect matrix  
®
®
®
• Core: Arm 32-bit Cortex -M4 CPU with FPU,  
adaptive real-time accelerator (ART  
– MIPI DSI Host controller with two DSI  
lanes running at up to 500 Mbits/s each  
Accelerator) allowing 0-wait-state execution  
from Flash memory, frequency up to 120 MHz,  
MPU, 150 DMIPS/1.25 DMIPS/MHz  
– LCD-TFT controller  
• 16x timers: 2 x 16-bit advanced motor-control,  
2 x 32-bit and 5 x 16-bit general purpose, 2x  
16-bit basic, 2x low-power 16-bit timers  
(available in Stop mode), 2x watchdogs,  
SysTick timer  
(Dhrystone 2.1), and DSP instructions  
• Performance benckmark  
– 1.25 DMIPS/MHz (Drystone 2.1)  
®
– 409.20 Coremark (3.41 Coremark/MHz  
• Up to 136 fast I/Os, most 5 V-tolerant, up to 14  
@120 MHz)  
I/Os with independent supply down to 1.08 V  
• Energy benckmark  
• Memories  
– 233 ULPMark™CP score  
– 2-Mbyte Flash, 2 banks read-while-write,  
proprietary code readout protection  
– 56.5 ULPMark™PP score  
• Clock sources  
– 640 Kbytes of SRAM including 64 Kbytes  
with hardware parity check  
– 4 to 48 MHz crystal oscillator  
– External memory interface for static  
memories supporting SRAM, PSRAM,  
NOR, NAND and FRAM memories  
– 32 kHz crystal oscillator for RTC (LSE)  
– Internal 16 MHz factory-trimmed RC (±1%)  
– Internal low-power 32 kHz RC (±5%)  
– 2 x OctoSPI memory interface  
• 4x digital filters for sigma delta modulator  
January 2020  
DS12023 Rev 5  
1/307  
This is information on a product in full production.  
www.st.com  
 
1234567...307

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