Datasheet > STM32L422KBU6

STM32L422KBU6

更新时间： 2025-07-17 19:36:07

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数据手册

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STM32L422KBU6 数据手册

STM32L422xx

Ultra-low-power Arm^®Cortex^®-M4 32-bit MCU+FPU, 100DMIPS,

128KB Flash, 40KB SRAM, analog, AES

Datasheet - production data

Features

• Ultra-low-power with FlexPowerControl

– 1.71 V to 3.6 V power supply

WLCSP36

(2.6x3.1 mm)

LQFP32 (7x7 mm)

LQFP48 (7x7 mm)

LQFP64 (10x10 mm)

UFQFPN32 (5x5 mm)

UFQFPN48 (7x7 mm)

UFBGA64 (5x5 mm)

– -40 °C to 85/125 °C temperature range

– 300 nA in V

mode: supply for RTC and

BAT

• Up to 52 fast I/Os, most 5 V-tolerant

32x32-bit backup registers

– 16 nA Shutdown mode (4 wakeup pins)

– 32 nA Standby mode (4 wakeup pins)

– 245 nA Standby mode with RTC

– 0.7 µA Stop 2 mode, 0.95 µA with RTC

– 79 µA/MHz run mode (LDO Mode)

– Batch acquisition mode (BAM)

– 4 µs wakeup from Stop mode

– Brown out reset (BOR)

• RTC with HW calendar, alarms and calibration

• Up to 12 capacitive sensing channels: support

touchkey, linear and rotary touch sensors

• 10x timers: 1x 16-bit advanced motor-control,

1x 32-bit and 2x 16-bit general purpose, 1x 16-

bit basic, 2x low-power 16-bit timers (available

in Stop mode), 2x watchdogs, SysTick timer

• Memories

– 128 KB single bank Flash, proprietary code

readout protection

– Interconnect matrix

• Core: Arm 32-bit Cortex -M4 CPU with FPU,

Adaptive real-time accelerator (ART

– 40 KB of SRAM including 8 KB with

hardware parity check

Accelerator™) allowing 0-wait-state execution

from Flash memory, frequency up to 80 MHz,

MPU, 100DMIPS and DSP instructions

– Quad SPI memory interface with XIP

capability

• Rich analog peripherals (independent supply)

• Performance benchmark

– 2x 12-bit ADC 5 Msps, up to 16-bit with

hardware oversampling, 200 µA/Msps

– 1.25 DMIPS/MHz (Drystone 2.1)

– 273.55 CoreMark (3.42 CoreMark/MHz @

– 2x operational amplifiers with built-in PGA

– 1x ultra-low-power comparator

80 MHz)

• Energy benchmark

– Accurate 2.5 V or 2.048 V reference

voltage buffered output

– 442 ULPMark-CP

– 165 ULPMark-PP

• AES: 128/256-bit key encryption hardware

• Clock Sources

accelerator

– 4 to 48 MHz crystal oscillator

• 12x communication interfaces

– 32 kHz crystal oscillator for RTC (LSE)

– Internal 16 MHz factory-trimmed RC (±1%)

– Internal low-power 32 kHz RC (±5%)

– USB 2.0 full-speed crystal less solution

with LPM and BCD

– 3x I2C FM+(1 Mbit/s), SMBus/PMBus

– 3x USARTs (ISO 7816, LIN, IrDA, modem)

– 1x LPUART (Stop 2 wake-up)

– 2x SPIs (and 1x Quad SPI)

– Internal multispeed 100 kHz to 48 MHz

oscillator, auto-trimmed by LSE (better than

±0.25 % accuracy)

– Internal 48 MHz with clock recovery

– PLL for system clock

– IRTIM (Infrared interface)

• 14-channel DMA controller

June 2019

DS12470 Rev 5

1/184

This is information on a product in full production.

www.st.com

12 3 4 5 6 7...184

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