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STM32L100R8T6 PDF预览

STM32L100R8T6

更新时间: 2024-11-27 17:33:27
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意法半导体 - STMICROELECTRONICS /
页数 文件大小 规格书
103页 1642K
描述
超低功耗32位超值系列Arm Cortex-M3 MCU,具有64 KB Flash、32 MHz CPU、LCD和USB

STM32L100R8T6 数据手册

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STM32L100C6 STM32L100R8  
STM32L100RB  
Ultra-low-power 32-bit MCU ARM®-based Cortex®-M3,  
128KB Flash, 10KB SRAM, 2KB EEPROM, LCD, USB, ADC, DAC  
Datasheet production data  
Features  
Ultra-low-power platform  
– 1.8 V to 3.6 V power supply  
LQFP64  
10 x 10 mm  
UFQFPN48  
7 x 7 mm  
– -40°C to 85°C temperature range  
– 0.3 µA Standby mode (2 wakeup pins)  
– 0.9 µA Standby mode + RTC  
– 0.57 µA Stop mode (16 wakeup lines)  
– 1.2 µA Stop mode + RTC  
Memories  
– Up to 128 Kbytes Flash memory with ECC  
– Up to 10 Kbytes RAM  
– 9 µA Low-power run mode  
– 214 µA/MHz Run mode  
– Up to 2 Kbytes of true EEPROM with ECC  
– 20-byte backup register  
– 10 nA ultra-low I/O leakage  
– < 8 µs wakeup time  
LCD Driver for up to 8x28 segments  
Analog peripherals  
®
®
Core: 32-bit ARM Cortex -M3 CPU  
– From 32 kHz up to 32 MHz max  
– 1.25 DMIPS/MHz (Dhrystone 2.1)  
– Memory protection unit  
– 12-bit ADC 1 Msps up to 20 channels  
– 12-bit DAC 2 channels with output buffers  
– Two ultra-low-power comparators  
Seven DMA controller channels  
Eight communication interface peripherals  
– One USB 2.0  
Reset and supply management  
– Ultra-safe, low-power BOR (brownout  
reset) with 5 selectable thresholds  
– Three USARTs (ISO 7816, IrDA)  
– Two SPIs (16 Mbit/s)  
– Ultra-low-power POR/PDR  
– Programmable voltage detector (PVD)  
– Two I2Cs (SMBus/PMBus)  
Clock sources  
Ten timers:  
– 1 to 24 MHz crystal oscillator  
– 32 kHz oscillator for RTC with calibration  
– High-speed internal 16 MHz  
– Internal low-power 37 kHz RC  
– Six 16-bit timers with up to 4 IC/OC/PWM  
channels  
– Two 16-bit basic timers  
– Two watchdog timers (independent and  
window)  
– Internal multispeed low-power 65 kHz to  
4.2 MHz  
CRC calculation unit  
All packages ECOPACK 2  
®
– PLL for CPU clock and USB (48 MHz)  
Pre-programmed bootloader  
– USART supported  
Development support  
– Serial wire debug supported  
– JTAG supported  
Up to 51 fast I/Os (42 I/Os 5V tolerant), all  
mappable on 16 external interrupt vectors  
April 2016  
DocID024295 Rev 5  
1/103  
This is information on a product in full production.  
www.st.com  

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