STK16CA8
128K x 8 AutoStorePlus™ nvSRAM
QuantumTrap™ CMOS
Nonvolatile Static RAM
Preliminary
FEATURES
DESCRIPTION
• 25ns, 35ns and 45ns Access Times
The Simtek STK16CA8 is a fast static RAM with a
nonvolatile element in each static memory cell. The
embedded nonvolatile elements incorporate
Simtek’s QuantumTrap™ technology producing the
world’s most reliable nonvolatile memory. The SRAM
provides unlimited read and write cycles, while inde-
pendent, nonvolatile data resides in the nonvolatile
elements. Data transfers from the SRAM to the non-
volatile elements (the STORE operation) can take
place automatically on power down or under soft-
ware control. An internal capacitor guarantees the
STORE operation, even under extreme power-down
slew rates or loss of power from “hot swapping”.
Transfers from the nonvolatile elements to the SRAM
(the RECALL operation) take place automatically on
restoration of power. Initiation of STORE and RECALL
cycles can also be controlled by entering control
sequences on the SRAM inputs. The STK16CA8 is
pin-compatible with 128k x 8 SRAMs and battery-
backed SRAMs, allowing direct substitution while
providing superior performance.
• Directly Replaces 128K x 8 Static RAM, Bat-
tery-Backed RAM or EEPROM
• Transparent Data Save on Power Down
• STORE to QuantumTrap™ Nonvolatile Ele-
ments is Initiated by Software or AutoStore-
Plus™on Power Down
• RECALL to SRAM Initiated by Software or
Power Restore
• 5mA Typical ICC at 200ns Cycle Time
• Unlimited READ and WRITE Cycles to SRAM
• 100-Year Data Retention to Quantum Trap
• Single 3V +20%, -10% Operation
• Commercial and Industrial Temperatures
• 32-Pin DIP Package
BLOCK DIAGRAM
PIN CONFIGURATIONS
VCC
A15
NC
W
NC
A16
A14
A12
A7
1
2
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
V
CC
3
4
Quantum Trap
1024 x 1024
5
6
7
8
A13
A8
POWER
A
A
A
A
A
A
A
A
A
A6
5
6
7
8
CONTROL
A5
A9
A4
A11
G
STORE
9
A3
A2
10
11
12
13
14
15
16
A10
E
STORE/
RECALL
STATIC RAM
9
A1
RECALL
ARRAY
12
13
14
15
16
A0
DQ7
DQ6
DQ5
DQ4
DQ3
CONTROL
1024 x 1024
DQ0
DQ1
DQ2
VSS
A
SOFTWARE
A
- A
15
0
PIN NAMES
DETECT
DQ
DQ
DQ
0
1
2
3
4
COLUMN I/O
A
- A
Address Inputs
Write Enable
Data In/Out
Chip Enable
Output Enable
Power (+ 3V)
Ground
0
16
COLUMN DEC
W
DQ
DQ
DQ - DQ
0
7
DQ
DQ
DQ
5
6
7
A
A
A
A
A
A A
10 11
0
1
2
3
4
E
G
G
E
W
V
V
CC
SS
September 2003
1
Document Control # ML0023 rev 0.1