Datasheet > STK15C88-SF35

STK15C88-SF35

更新时间： 2023-02-26 13:37:54

品牌	Logo	应用领域
赛普拉斯 - CYPRESS		静态存储器光电二极管
页数	文件大小	规格书
10页	294K
描述
32KX8 NON-VOLATILE SRAM, 35ns, PDSO28, 0.350 INCH, PLASTIC, SOIC-28

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STK15C88-SF35 数据手册

STK15C88

32K x 8 AutoStore™ nvSRAM

QuantumTrap™ CMOS

Nonvolatile Static RAM

FEATURES

DESCRIPTION

• Nonvolatile Storage without Battery Problems

The STK15C88 is a fast SRAM with a nonvolatile

element incorporated in each static memory cell.

The SRAM can be read and written an unlimited

number of times, while independent nonvolatile data

resides in nonvolatile elements. Data transfers from

the SRAM to the nonvolatile elements (the STORE

operation) can take place automatically on power

down using charge stored in system capacitance.

Transfers from the nonvolatile elements to the SRAM

(the RECALL operation) take place automatically on

restoration of power. Initiation of STORE and RECALL

cycles can also be controlled by entering specific

read sequences. The STK15C88 is pin-compatible

with 32k x 8 SRAMs and battery-backed SRAMs,

allowing direct substitution while enhancing perfor-

mance. A similar device (STK16C88) with an inter-

nally integrated capacitor is available for

applications with very fast power-down slew rates.

The STK14C88, which uses an external capacitor, is

another alternative for these applications.

• Directly Replaces 32K x 8 Static RAM, Battery-

Backed RAM or EEPROM

• 25ns, 35ns and 45ns Access Times

• STORE to nonvolatile elements Initiated by

Software or AutoStore™

• RECALL to SRAM Initiated by Software or

Power Restore

• 10mA Typical I_CCat 200ns Cycle Time

• Unlimited READ, WRITE and RECALL Cycles

• 1,000,000 STORE Cycles to nonvolatile ele-

ments

• 100-Year Data Retention in nonvolatile ele-

ments (Commercial/Industrial)

• Single 5V + 10% Operation

• Commercial and Industrial Temperatures

• 28-Pin PDIP and SOIC Packages

BLOCK DIAGRAM

PIN CONFIGURATIONS

A₁₄

A₁₂

A₇

V_CC

QUANTUM TRAP

512 x 512

A₁₃

A₈

A₆

A₅

A₉

A₆

STORE

A₄

A₁₁

A₁₀

STORE/

RECALL

A₇

POWER

A₃

A₈

STATIC RAM

ARRAY

CONTROL

A₂

CONTROL

RECALL

A₉

A₁

A₀

DQ₇

DQ₆

DQ₅

DQ₄

DQ₃

A₁₁

A₁₂

A₁₃

A₁₄

512 x 512

28 - 300 PDIP

28 - 600 PDIP

28 - 300 SOIC

28 - 350 SOIC

DQ₀

DQ₁

DQ₂

V_SS

SOFTWARE

DETECT

- A

PIN NAMES

COLUMN I/O

- A

Address Inputs

COLUMN DEC

Write Enable

Data In/Out

Chip Enable

Output Enable

Power (+ 5V)

Ground

DQ - DQ

A A A

A A

1 4

2 3

September 2003

Document Control # ML0016 rev 0.1

12 3 4 5 6 7...10

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