Applying the STK11C88, STK15C88
and STK16C88 32K x 8 nvSRAM
Abstract
SRAM Operations
Simtek Corporation’s family of high speed 256 kilobit
nonvolatile Static Random Access Memories
includes the STK15C88 AutoStore™ and
STK11C88 Software Store and STK16C88
AutoStorePlus™ devices. All three memories have
industry-standard 32K x 8 architectures and pin-outs
(Figure 1), and are drop-in replacements for many
standard SRAM and BatRAM products. As with all
Simtek nvSRAM products, the STK11C88,
STK15C88 and STK16C88 do not require batteries
or other power sources to maintain nonvolatility for a
guaranteed minimum of 100 years, even at high
temperatures.
The STK11C88, STK15C88 and STK16C88 nvS-
RAM memories are identical in the operation of their
RAM front ends, and look to the design engineer like
industry standard 32K x 8 fast SRAMs.
A14
A12
A7
A6
A5
A4
A3
A2
A1
1
28
27
26
25
24
23
22
21
20
19
18
17
16
15
VCC
W
A13
A8
A9
A11
G
2
3
4
5
6
7
8
A10
E
9
A0
10
11
12
13
14
DQ7
DQ6
DQ5
DQ4
DQ3
The STK15C88 AutoStore™ and STK16C88
AutoStorePlus™ memories both automatically
STORE the SRAM data into EEPROM upon power
loss, and require no external power storage compo-
nents such as batteries or capacitors. They are
available in speeds of 20, 25, 35, and 45 nanosec-
onds.
DQ0
DQ1
DQ2
VSS
Figure 1
STK11C88/STK15C88/STK16C88 Pin-Out
The STK11C88 Software Store memory is designed
for safe storage of data under processor control.
The STK11C88 virtually eliminates the danger of
inadvertent data loss due to human error or elec-
tronics failure. It is ideally suited for applications that
would normally require the combination of high
speed SRAM and EEPROM, and performs both
functions in one package. The resultant savings in
board space, glue logic (parts count), and power
consumption helps to reduce costs and increase
packaging density. The STK11C88 is available in
20, 25, 35, and 45 nanosecond versions, and can
be interfaced to most standard microprocessors
without interface logic or memory wait states.
The three control lines, Write Enable (W), Chip
Enable (E), and Output Enable (G) are utilized in the
same manner as a standard SRAM. This front end
functional equivalency allows improvements to be
made to old designs without PWB (Printed Wiring
Board) or control logic changes. The ability of
Simtek's nvSRAM devices to run at processor bus
speeds eliminates the need for wait states, bus con-
trol logic, or specialized decoder circuitry. This com-
bination of speed and versatility in one package
serves to simplify board layout and reduce device
count.
SRAM Reads are performed whenever E and G are
low and W is high. The output data on lines DQ0 -
DQ7 corresponds to the address specified on pins
A0 - A14.
Both memories automatically RECALL nonvolatile
data into the SRAM portion of the chip at power-up
without processor intervention or external control.
Simtek's family of nonvolatile memories give the
product development engineer the ability to design
modern embedded and state machines without the
worry of data loss or corruption due to power failure.
SRAM Writes are performed whenever E and W are
low. The data on pins DQ0 - DQ7 will be written into
memory at the location specified by the address
present on lines A0 - A14. The G (Output Enable)
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