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STIH223 PDF预览

STIH223

更新时间: 2024-11-26 12:23:15
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 控制器
页数 文件大小 规格书
4页 85K
描述
HD cable STB processor with integrated demodulator and low power standby controller

STIH223 数据手册

 浏览型号STIH223的Datasheet PDF文件第2页浏览型号STIH223的Datasheet PDF文件第3页浏览型号STIH223的Datasheet PDF文件第4页 
STiH223  
HD cable STB processor with integrated demodulator  
and low power standby controller  
Data brief  
Features  
Description  
ST40 applications CPU with 256 KB L2 cache  
16-bit LMI supporting DDR2/DDR3  
The STiH223 uses the latest process technology  
to provide a cost-effective, feature rich, highly  
integrated SoC for set-top boxes (STBs). It is  
targeted at the advanced decoding STB market  
across American and Asian cable networks that  
utilize the ITU-T J.83 annex B physical layer. It is  
suitable both for operator (with advanced security)  
and retail markets.  
Decoding of H264, MPEG2, VC-1 and AVS HD  
video streams  
3DTV decoding and display compatible with  
HDMI 1.4a  
Extensive connectivity (2 × USB 2.0 ports;  
Ethernet MII/RMII/TMII port; SD/MMC card  
port; eSATA port; PCI-e)  
The STiH223 provides a solution for operators  
and manufacturers to specify a range of cost-  
effective, high performance STBs, including basic  
zappers, interactive STBs, and DVR STBs with  
content delivery possible using broadcast or  
broadband networks or both (hybrid STBs).  
Secure boot from SLC NAND Flash or Serial  
NOR Flash; eMMC booting option  
Low-power process and architecture  
Integrated low power standby controller  
High-quality video resizing and de-interlacing  
Integrated Ethernet PHY  
The STiH223 integrates a high performance cable  
receiver, supporting reception, channel  
demodulation, and forward error correction (FEC)  
and is fully compliant with the ITU-T J.83 annex B  
standard.  
Targets two layer PCBs for cost-effective  
zapper STB applications  
Integrates ITU-T J.83 annex B demodulation  
and FEC  
Resets  
Clocks  
Modes  
Analog out  
PCM I/O  
S/PDIF out  
STB peripherals I/O  
external interrupts  
JTAG  
CPU/FPU  
Audio I/O  
Peripherals  
System  
interfaces  
Clock Gen  
System  
SLC NAND Flash  
services  
Serial Flash  
CI-Plus cards  
DDR2/DDR3  
Dual FDMA  
L2 cache  
Audio decoder  
DDR3 LMI  
STBus  
Transport  
Security  
Display  
Video I/O  
Dual USB  
eSATA/PCI-e  
Ethernet  
Video decoder  
Low power  
standby  
controller  
Connectivity  
ITU-T J.83 annex B  
demodulator  
SD-MMC/SDIO  
IF in  
Transport  
stream  
Transport streams  
Parallel/serial in/out  
Analog video  
HDMI  
March 2012  
Doc ID 22935 Rev 1  
1/4  
For further information contact your local STMicroelectronics sales office.  
www.st.com  
4

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