Datasheet > STIDP880

STIDP880

更新时间： 2024-11-23 06:14:39

品牌	Logo	应用领域
意法半导体 - STMICROELECTRONICS		转换器
页数	文件大小	规格书
6页	96K
描述
iDP to LVDS converter

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中文翻译

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数据手册

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STIDP880 数据手册

STiDP880

iDP to LVDS converter

Data brief

■ Supports Asynchronous Scrambler Seed

Features

Reset (ASSR) for premium contents reception

■ Internal DisplayPort (iDP) receiver

– Compliant with proposed iDP specification

– 3.24 Gbps per lane

■ Configurable through I2C host interface

■ Supports Spread Spectrum for EMI/RFI

reduction

– 1, 2, or 4 lanes

– HPD pulse assertion as per proposed iDP

standard

■ Robust interoperability – supports FFC and

UTP type cables

■ Low power operation; 20 mW standby

■ Supports video timings up to 1920 x 1080

■ Package

(FHD) 120 Hz/10-bit color

– 164 LFBGA (12 x 12 mm/0.8 mm pitch)

– HF and RoHS compliant

■ Interface compatibility with wide range of

panels

■ Power supply voltages

– Quad LVDS interface up to 100 MHz per

channel (400 MHz pixel rate)

– 3.3 V I/O; 1.2 V core

– High speed dual-link LVDS up to 150 MHz

per channel (300 MHz pixel rate)

■ ESD

– 2 KV HBM, 200 V MM, 600V CDM

– Supports JEIDA, non-JEIDA, VESA pixel

data mappings

Applications

■ High refresh rate TV/monitor panel interface

Internal

Bus Formatter

LVDS Outputs

Q-LVDS

output

iDP Input

DisplayPort

4 Main Lanes

Receiver

HPD

I2C Host

Interface

December 2009

Doc ID 16899 Rev 1

1/6

For further information contact your local STMicroelectronics sales office.

www.st.com

12 3 4 5 6

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