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STI7108ZWA PDF预览

STI7108ZWA

更新时间： 2024-11-06 06:14:39
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 解码器
页数 文件大小 规格书
12页 256K
描述
Advanced HD AVC decoder with 3D graphics acceleration

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中文翻译

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STI7108ZWA 技术参数

生命周期：Obsolete包装说明：,
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.82
Base Number Matches：1

STI7108ZWA 数据手册

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STi7108  
Advanced HD AVC decoder with 3D graphics acceleration  
Data brief  
Features  
Description  
■ Open GL ES 2.0/Open VG 1.1 compatible 3D  
STi7108 is the next generation of HD, AVC set-top  
box decoder for satellite, cable, terrestrial and  
IP-STB markets.  
graphics GPU for enhanced EPGs/UIs  
■ Dual HD (1080i/720p) video decode for PIP or  
mosaic support  
The STi7108 provides a solution for operators to  
specify a range of high-performance, MPEG2 /  
H.264 / VC-1 STBs.  
■ 1080p50, 1080p60 video decoding  
■ High-performance ST40-300 500 MHz  
applications CPU with Level 2 cache  
The STi7108 can be used with Zappers, IP  
clients, DVR standalone, and DVR server/home  
network STBs, especially where true 3D graphics  
is required.  
■ High-performance ST40-300 500 MHz  
real-time CPU  
■ Dual eSATA ports  
Content delivery is possible using broadcast or  
broadband networks, or both (hybrid STBs).  
■ Triple USB 2.0 host ports  
■ Dual 16-bit/32-bit LMI supporting DDR2/DDR3  
■ Dual Ethernet GMAC  
The STi7108 is also targeted at next generation  
DLNA compatible Blu-ray (BD) and HD Media  
players.  
■ Low power process and design with dynamic  
power management architecture  
Resets  
Clocks  
Modes  
Analog out  
PCM I/O  
S/PDIF out  
STB peripherals I/O  
External interrupts  
JTAG  
CPU/FPU  
Audio I/O  
Peripherals  
System  
interfaces  
Clock Gen  
System serv  
Flash, SFlash  
NOR, NAND  
Dual  
ST40-300  
500 MHz  
SSC  
UART  
MAFE  
PWM  
GPIOs  
IR/UHF  
Smartcard  
Key scan  
PCM Players  
PCM Reader  
DACs  
Triple FDMA  
L2 cache  
EMI  
PCI  
SPI  
Serial Flash  
PCI peripherals  
DDR2/DDR3  
MMU  
Interrupts  
I cache  
D cache  
Timer  
Audio decoder  
ST231 CPU  
Dual LMI  
Low power  
Debug  
STBus  
Transport  
Security  
Display  
Video I/O  
Triple USB  
Dual eSATA  
Dual Ethernet  
SD-MMC/SDIO  
DAA  
Video decoder  
ST231 CPU  
Delta Mu  
Bdisp blitter  
Tile SRAM  
Video planes  
Graphic planes  
Cursor plane  
Main VDP  
Aux VDP  
DVO  
Denc  
Teletext  
DACs  
VTGs  
DVP  
Application  
Co-processor  
ST231 CPU  
STFE  
STBE  
Connectivity  
MSCC  
MCHI  
DEI, IQI  
Capture  
HDMI 1.3  
HDCP  
3D graphics  
processing unit  
Transport streams  
Parallel/serial in/out  
Digital video HD/SD in/out  
Analog video HD/SD out  
November 2009  
Doc ID 16790 Rev 1  
1/12  
For further information contact your local STMicroelectronics sales office.  
www.st.com  
12  
1234567...12

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