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STI5300AUA PDF预览

STI5300AUA

更新时间: 2024-11-23 03:27:39
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 解码器
页数 文件大小 规格书
3页 87K
描述
High-performance set-top box decoder

STI5300AUA 数据手册

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STi5300  
High-performance set-top box decoder  
DATA BRIEF  
DESCRIPTION  
The new STi5300 MPEG-2 decoder from ST  
provides a step-change in performance for pay TV  
set-top boxes and digital video recorders.  
Package (27 x 27 PBGA 336 package)  
Delivering 1.33 GOPS of processing power  
through an ST230 VLIW CPU running at 333 MHz,  
ST has ensured that manufacturers’ investment in  
new products is protected as the STi5300 can  
easily accommodate today’s interactive software,  
and provides a platform that can support the even  
more demanding applications of the future. Both  
Linux and OS21 operating systems are supported,  
and an MMU provides support for virtual memory  
management.  
The STi5300’s power comes from the VLIW  
architecture of the ST230 CPU. This allows four  
instructions to be executed at each CPU cycle,  
dramatically  
increasing  
performance.  
By  
maintaining pin compatibility with the STi5100,  
manufacturers can make use of the STi5300 with  
minimal hardware redesign.  
Figure 1. STi5300 low-cost interactive set-top box  
IR Tx/Rx  
128 Mbit  
DDR  
HDD  
QPSK ZIF Rx  
Transport  
stream in  
USB  
port  
STV0299  
and  
STB6000  
RGB  
STi5300  
QPSK ZIF Rx  
Transport  
stream in  
STV0299  
and  
CVBS/YC  
STB6000  
VCR  
(Optional)  
SiLabs  
DAA  
Smart  
PSTN  
cards  
Flash  
Rev. 1  
September 2005  
1/3  

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