Datasheet > STI1010ZUA

STI1010ZUA

更新时间： 2024-09-17 18:35:47

品牌	Logo	应用领域
意法半导体 - STMICROELECTRONICS		/
页数	文件大小	规格书
5页	132K
描述
STI1010ZUA

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中文翻译

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技术参数
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STI1010ZUA 技术参数

是否Rohs认证：	符合	生命周期：	Obsolete
Reach Compliance Code：	compliant	风险等级：	5.84
JESD-609代码：	e2	湿度敏感等级：	3
端子面层：	Tin/Silver (Sn/Ag)	Base Number Matches：	1

STI1010ZUA 数据手册

STi1010

Single-chip worldwide iDTV processor

Data Brief

■

HDMI/HDCP input, RGB/YCrCb up to 1080p,

UXGA/60 Hz support, stereo and 5.1 multi-channel

audio. Compliant with HDMI 1.3, DVI 1.0,

HDCP v1.3

Features

■

32-Bit RISC ST40 CPU, 266 MHz, 480 MIPs

DDR2 unified memory interface, 250 MHz clock

■

USB2.0 high speed interface (480 Mbits/s)

High definition video processor

Transport stream demultiplexer with DES, DVB and

Multi2 descrambler

Multi-standard color decoder (PAL/SECAM/NTSC),

with 3D comb filtering in NTSC and PAL, Luma and

Chroma spatio-temporal (3D) noise reduction

■

CableCard and DVB-CI interface

MP@ML and MP@HL MPEG2 video decoder

24-bit audio DSP core, MPEG1(layers 1,2,3),

MPEG2, MPEG2-AAC, Dolby® Digital,

MP3 decoder

■

Double video pipe for Picture In Picture (PIP) display

2D graphic accelerator and enhanced True color on

screen display. Bitmap OSD generated at panel

resolution

■

Analog video input: CVBS, SVHS(Y/C), Component

(from SD up to HD 720p, 1080i, 1080p)

■

Video and graphic composition for Picture And Text

(PAT), Picture And Graphic (PAG), mosaic

PC input, analog RGB up to UXGA/60 Hz (162 MHz

sampling frequency)

Exhaustive set of peripherals for DTV chassis

control

24-bit digital video input, up to 1080p and

UXGA/60 Hz

■

Dual LVDS output for flat panel display support, up

to full HD 1920 × 1080p resolution.

Package FPBGA 27×27, 700 balls, pitch 0.8 mm

PIOs

MUX

USB2.0

HOST

System

Clock

Mgt

ST40

EMI

LMI

Local

HDMI/

HDCP

input

ADC ADC ADC ADC

CPU

266 MHz,

480 MIPs

16K-I

32K-D

External

Memory

Interface

NAND/NOR

Flash

D1/HD

Chassis Control

JTAG

Advance

User

Memory

Interface

VTG

main

and aux

HD/D1 in

Digital

Decoder

(IT, WDG, RTC, ADC, IR,

24/16/8-bit

digital in.

HD H/V syncs

PWM, UARTs, I C...)

DDR2-500

Debug

3D Comb

3D-NR

STi1010

ST Bus On-Chip Interconnect

Secondary*

GFx

Main

Aux Video*

MPEG-2

Video Decoder

(SD / HD)

2D GFx

accelerator

Video pipe

FMD/DEi

H/V SRC IQI

Video pipe

DEi-light

H/V SRC

planes

(×2)

Text/CC

VBI denc

Aux

Compo.

TSin

Audio Decoder (DSP)

TS Processing

CA Interfaces

Main Compositor

DENC

MPEG1, MPEG2, MP3

Dolby Digital, AAC

Gamma, Color warping, PCE

Dual LVDS transmitter

DAC DAC DAC

December 2007

Rev 1

1/5

For further information contact your local STMicroelectronics sales office.

www.st.com

12 3 4 5

中文翻译

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STI13002	ETC	获取价格	TRANSISTOR \| BJT \| NPN \| 600V V(BR)CEO \| 1A I(C) \| TO-220
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