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STD2N50 PDF预览

STD2N50

更新时间: 2024-09-18 22:29:07
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 晶体晶体管
页数 文件大小 规格书
10页 176K
描述
N - CHANNEL ENHANCEMENT MODE POWER MOS TRANSISTOR

STD2N50 数据手册

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STD2N50  
N - CHANNEL ENHANCEMENT MODE  
POWER MOS TRANSISTOR  
TYPE  
VDSS  
RDS(on)  
< 5.5 Ω  
ID  
STD2N50  
500 V  
2 A  
TYPICAL RDS(on) = 4.5 Ω  
AVALANCHE RUGGED TECHNOLOGY  
100% AVALANCHE TESTED  
REPETITIVE AVALANCHE DATA AT 100oC  
APPLICATION ORIENTED  
3
3
2
CHARACTERIZATION  
1
1
THROUGH-HOLE IPAK (TO-251) POWER  
PACKAGE IN TUBE (SUFFIX ”-1”)  
SURFACE-MOUNTING DPAK (TO-252)  
POWER PACKAGE IN TAPE & REEL  
(SUFFIX ”T4”)  
IPAK  
TO-251  
(Suffix ”-1”)  
DPAK  
TO-252  
(Suffix ”T4”)  
APPLICATIONS  
HIGH CURRENT, HIGH SPEED SWITCHING  
SWITCH MODE POWER SUPPLIES (SMPS)  
CHOPPER REGULATORS, CONVERTERS,  
MOTOR CONTROL, LIGHTING FOR  
INDUSTRIAL AND CONSUMER  
INTERNAL SCHEMATIC DIAGRAM  
ENVIRONMENT  
ABSOLUTE MAXIMUM RATINGS  
Symbol  
VDS  
Parameter  
Value  
500  
Unit  
Drain-source Voltage (VGS = 0)  
Drain- gate Voltage (RGS = 20 k)  
Gate-source Voltage  
Drain Current (continuous) at Tc = 25 oC  
Drain Current (continuous) at Tc = 100 oC  
Drain Current (pulsed)  
V
V
VDG R  
VGS  
500  
± 20  
2
V
ID  
A
ID  
1.25  
8
A
IDM()  
Ptot  
A
Total Dissipation at Tc = 25 oC  
45  
W
Derating Factor  
0.36  
-65 to 150  
150  
W/oC  
oC  
oC  
Tstg  
Tj  
Storage Temperature  
Max. Operating Junction Temperature  
() Pulse width limited by safe operating area  
1/10  
December 1996  

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