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STB20PF75TRL PDF预览

STB20PF75TRL

更新时间: 2024-11-02 13:00:39
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 晶体晶体管功率场效应晶体管开关脉冲
页数 文件大小 规格书
9页 282K
描述
TRANSISTOR,MOSFET,P-CHANNEL,75V V(BR)DSS,20A I(D),TO-263AB

STB20PF75TRL 技术参数

是否Rohs认证: 符合生命周期:Obsolete
Reach Compliance Code:not_compliant风险等级:5.84
配置:Single最大漏极电流 (Abs) (ID):20 A
FET 技术:METAL-OXIDE SEMICONDUCTORJESD-609代码:e3
工作模式:ENHANCEMENT MODE最高工作温度:175 °C
极性/信道类型:P-CHANNEL最大功率耗散 (Abs):80 W
子类别:Other Transistors表面贴装:YES
端子面层:Matte Tin (Sn)Base Number Matches:1

STB20PF75TRL 数据手册

 浏览型号STB20PF75TRL的Datasheet PDF文件第2页浏览型号STB20PF75TRL的Datasheet PDF文件第3页浏览型号STB20PF75TRL的Datasheet PDF文件第4页浏览型号STB20PF75TRL的Datasheet PDF文件第5页浏览型号STB20PF75TRL的Datasheet PDF文件第6页浏览型号STB20PF75TRL的Datasheet PDF文件第7页 
STB20PF75  
P-CHANNEL 75V - 0.10 - 20A D²PAK  
STripFET™ II POWER MOSFET  
V
R
I
TYPE  
DSS  
DS(on)  
D
STB20PF75  
75 V  
< 0.12 Ω  
20 A  
TYPICAL RDS(on) = 0.10 Ω  
EXCEPTIONAL dv/dt CAPABILITY  
100% AVALANCHE TESTED  
APPLICATION ORIENTED  
CHARACTERIZATION  
3
1
2
D PAK  
DESCRIPTION  
TO-263  
This Power MOSFET is the latest development of  
STMicroelectronis unique "Single Feature Size™"  
strip-based process. The resulting transistor  
shows extremely high packing density for low on-  
resistance, rugged avalanche characteristics and  
less critical alignment steps therefore a remark-  
able manufacturing reproducibility.  
(Suffix “T4”)  
ADD SUFFIX “T4” FOR ORDERING IN TAPE & REEL  
INTERNAL SCHEMATIC DIAGRAM  
APPLICATIONS  
MOTOR CONTROL  
DC-DC & DC-AC CONVERTERS  
ABSOLUTE MAXIMUM RATINGS  
Symbol  
Parameter  
Value  
75  
Unit  
V
V
DS  
Drain-source Voltage (V = 0)  
GS  
V
DGR  
Drain-gate Voltage (R = 20 k)  
75  
V
GS  
V
Gate- source Voltage  
± 20  
20  
V
GS  
I
Drain Current (continuous) at T = 25°C  
A
D
C
I
Drain Current (continuous) at T = 100°C  
14  
A
D
C
I
(•)  
Drain Current (pulsed)  
80  
A
DM  
P
tot  
Total Dissipation at T = 25°C  
80  
W
C
Derating Factor  
0.53  
10  
W/°C  
V/ns  
mJ  
(1)  
Peak Diode Recovery voltage slope  
Single Pulse Avalanche Energy  
Storage Temperature  
dv/dt  
(2)  
E
AS  
350  
T
stg  
-55 to 175  
°C  
T
Operating Junction Temperature  
j
(•) Pulse width limited by safe operating area  
Note: For the P-CHANNEL MOSFET actual polarity of voltages and  
current has to be reversed  
(1) I 20A, di/dt 200A/µs, V V  
, T T  
j JMAX  
SD  
DD  
(BR)DSS  
o
(2) Starting T = 25 C, I = 10 A, V = 30V  
j
D
DD  
March 2004  
1/9  

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