STA2500D

更新时间： 2024-02-06 11:35:48

品牌	Logo	应用领域
意法半导体 - STMICROELECTRONICS		电信集成电路电信电路蓝牙
页数	文件大小	规格书
57页	582K
描述
Bluetooth™ V2.1 + EDR ("Lisbon") for automotive applications

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技术参数
数据手册

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STA2500D 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Active	零件包装代码：	BGA
包装说明：	LFBGA, BGA48,7X7,32	针数：	48
Reach Compliance Code：	compliant	HTS代码：	8542.39.00.01
风险等级：	5.61	JESD-30 代码：	S-PBGA-B48
JESD-609代码：	e1	长度：	6 mm
湿度敏感等级：	3	功能数量：	1
端子数量：	48	最高工作温度：	85 °C
最低工作温度：	-40 °C	封装主体材料：	PLASTIC/EPOXY
封装代码：	LFBGA	封装等效代码：	BGA48,7X7,32
封装形状：	SQUARE	封装形式：	GRID ARRAY
峰值回流温度（摄氏度）：	260	电源：	2.75 V
认证状态：	Not Qualified	座面最大高度：	1.25 mm
子类别：	Other Telecom ICs	标称供电电压：	2.75 V
表面贴装：	YES	电信集成电路类型：	TELECOM CIRCUIT
温度等级：	INDUSTRIAL	端子面层：	Tin/Silver/Copper (Sn/Ag/Cu)
端子形式：	BALL	端子节距：	0.8 mm
端子位置：	BOTTOM	处于峰值回流温度下的最长时间：	NOT SPECIFIED
宽度：	6 mm	Base Number Matches：	1

STA2500D 数据手册

STA2500D

Bluetooth™ V2.1 + EDR ("Lisbon") for automotive applications

Features

■ Based on Ericsson technology licensing

baseband core (EBC)

LFBGA48 (6x6x1.4mm; 0.8mm Pitch)

■ Low power consumption

■ Bluetooth™ specification compliance:

V2.1 + EDR (“Lisbon”)

– Point-to-point, point-to-multipoint (up to 7

slaves) and scatternet capability

– Support ACL and SCO links

– Extended SCO (eSCO) links

– Faster connection

– Ultra low power architecture with 3 different

low-power levels

– Deep sleep modes, including host-power

saving feature

– Dual wake-up mechanism: initiated by the

host or by the Bluetooth device

■ HW support for packet types

– ACL: DM1, DM3, DM5, DH1, DH3, DH5, 2-

DH1, 2-DH3, 2-DH5, 3-DH1, 3-DH3, 3-DH5

– SCO: HV1, HV3 and DV

■ Communication interfaces

– Fast UART up to 4 MHz

– Flexible SPI interface up to 13 MHz

– PCM interface

– Up to 10 additional flexibly programmable

GPIOs

– eSCO: EV3, EV4, EV5, 2-EV3, 2-EV5, 3-

EV3, 3-EV5

■ Adaptive frequency hopping (AFH)

– External interrupts possible through the

GPIOs

– Fast I C interface as master

■ Channel quality driven data rate (CQDDR)

■ “Lisbon” features

– Encryption pause/resume (EPR)

– Extended inquiry response (EIR)

– Link supervision time out (LSTO)

– Secure simple pairing

– Sniff subrating

■ Clock support

– System clock input (digital or sine wave) at

9.6, 10, 13, 16, 16.8, 19.2, 26, 33.6 or 38.4 MHz

– Low power clock input at 3.2 kHz, 32 kHz

and 32.768 kHz

– Quality of service (QoS)

Packet boundary flag

■ ARM7TDMI CPU

Erroneous data delivery

■ Memory organization

■ Transmit power

– On chip RAM, including provision for

– Power class 2 and power class 1.5 (above

4 dBm)

– Programmable output power

– Power class 1 compatible

patches

– On chip ROM, preloaded with SW up to

HCI

■ Ciphering support up to 128-bit key

■ HCI

■ Single power supply with internal regulators for

– HCI H4 and enhanced H4 transport layer

– HCI proprietary commands (e.g.

peripherals control)

– Single HCI command for patch/upgrade

download

core voltage generation

■ Supports 1.65 V to 2.85 V I/O systems

■ Auto calibration (VCO, filters)

Table 1.

Order code

STA2500D

Device summary

– eSCO over HCI supported

Package

Packing

■

Supports pitch-period error concealment (PPEC)

Tray

Tape and reel

■ Efficient and flexible support for WLAN

LFBGA48

STA2500DTR

coexistence scenarios

July 2009

Doc ID 16067 Rev 1

1/57

www.st.com

12 3 4 5 6 7...57

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