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ST72F521AR9TCTXE PDF预览

ST72F521AR9TCTXE

更新时间: 2024-11-03 12:59:31
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 闪存微控制器和处理器外围集成电路时钟
页数 文件大小 规格书
215页 4598K
描述
IC,MICROCONTROLLER,8-BIT,ST72 CPU,CMOS,QFP,64PIN,PLASTIC

ST72F521AR9TCTXE 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Active零件包装代码:QFP
包装说明:QFP, QFP64,.47SQ,20针数:64
Reach Compliance Code:compliant风险等级:5.8
Is Samacsys:N具有ADC:YES
地址总线宽度:位大小:8
CPU系列:ST72最大时钟频率:16 MHz
DMA 通道:NO外部数据总线宽度:
JESD-30 代码:S-PQFP-G64JESD-609代码:e3
长度:10 mm湿度敏感等级:1
I/O 线路数量:48端子数量:64
最高工作温度:125 °C最低工作温度:-40 °C
PWM 通道:YES封装主体材料:PLASTIC/EPOXY
封装代码:QFP封装等效代码:QFP64,.47SQ,20
封装形状:SQUARE封装形式:FLATPACK
峰值回流温度(摄氏度):225电源:5 V
认证状态:Not QualifiedRAM(字节):2048
ROM(单词):61440ROM可编程性:FLASH
速度:8 MHz子类别:Microcontrollers
最大压摆率:15 mA最大供电电压:5.5 V
最小供电电压:3.8 V标称供电电压:5 V
表面贴装:YES技术:CMOS
温度等级:AUTOMOTIVE端子面层:Matte Tin (Sn)
端子形式:GULL WING端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:10 mmuPs/uCs/外围集成电路类型:MICROCONTROLLER
Base Number Matches:1

ST72F521AR9TCTXE 数据手册

 浏览型号ST72F521AR9TCTXE的Datasheet PDF文件第2页浏览型号ST72F521AR9TCTXE的Datasheet PDF文件第3页浏览型号ST72F521AR9TCTXE的Datasheet PDF文件第4页浏览型号ST72F521AR9TCTXE的Datasheet PDF文件第5页浏览型号ST72F521AR9TCTXE的Datasheet PDF文件第6页浏览型号ST72F521AR9TCTXE的Datasheet PDF文件第7页 
ST72F521, ST72521B  
80/64-PIN 8-BIT MCU WITH 32 TO 60K FLASH/ROM, ADC,  
FIVE TIMERS, SPI, SCI, I2C, CAN INTERFACE  
Memories  
– 32K to 60K dual voltage High Density Flash  
(HDFlash) or ROM with read-out protection  
capability. In-Application Programming and  
In-Circuit Programming for HDFlash devices  
– 1K to 2K RAM  
– HDFlash endurance: 100 cycles, data reten-  
tion: 20 years at 55°C  
Clock, Reset And Supply Management  
TQFP64  
14 x 14  
– Enhanced low voltage supervisor (LVD) for  
main supply and auxiliary voltage detector  
(AVD) with interrupt capability  
TQFP64  
10 x 10  
TQFP80  
14 x 14  
– Clock sources: crystal/ceramic resonator os-  
cillators, internal RC oscillator and bypass for  
external clock  
– PLL for 2x frequency multiplication  
– Four power saving modes: Halt, Active-Halt,  
4 Communications Interfaces  
Wait and Slow  
– SPI synchronous serial interface  
– SCI asynchronous serial interface  
Interrupt Management  
– Nested interrupt controller  
– 14 interrupt vectors plus TRAP and RESET  
– Top Level Interrupt (TLI) pin  
2
– I C multimaster interface  
(SMbus V1.1 compliant)  
– CAN interface (2.0B Passive)  
Analog periperal (low current coupling)  
– 15 external interrupt lines (on 4 vectors)  
Up to 64 I/O Ports  
– 10-bit ADC with 16 input robust input ports  
– 48 multifunctional bidirectional I/O lines  
– 34 alternate function lines  
– 16 high sink outputs  
Instruction Set  
– 8-bit Data Manipulation  
– 63 Basic Instructions  
– 17 main Addressing Modes  
– 8 x 8 Unsigned Multiply Instruction  
Development Tools  
5 Timers  
– Main Clock Controller with: Real time base,  
Beep and Clock-out capabilities  
– Configurable watchdog timer  
– Two 16-bit timers with: 2 input captures, 2 out-  
put compares, external clock input on one tim-  
er, PWM and pulse generator modes  
– 8-bit PWM Auto-Reload timer with: 2 input  
captures, 4 PWM outputs, output compare  
and time base interrupt, external clock with  
event detector  
– Full hardware/software development package  
– In-Circuit Testing capability  
Device Summary  
Features  
Program memory - bytes  
RAM (stack) - bytes  
Operating Voltage  
Temp. Range  
ST72F521(M/R/AR)9  
Flash 60K  
ST72F521(R/AR)6  
Flash 32K  
ST72521B(M/R/AR)9  
ROM 60K  
ST72521B(R/AR)6  
ROM 32K  
2048 (256)  
1024 (256)  
2048 (256)  
1024 (256)  
3.8V to 5.5V  
up to -40°C to +125 °C  
TQFP80 14x14 (M),  
TQFP64 14x14 (R),  
TQFP64 10x10 (AR)  
TQFP80 14x14 (M),  
TQFP64 14x14 (R),  
TQFP64 10x10 (AR)  
TQFP64 14x14 (R), TQFP64  
10x10 (AR)  
TQFP64 14x14 (R), TQFP64  
10x10 (AR)  
Package  
Rev. 5  
May 2005  
1/215  
1

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