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ST70136G PDF预览

ST70136G

更新时间: 2024-11-22 22:42:39
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 调制解调器电信集成电路电信电路信息通信管理
页数 文件大小 规格书
24页 362K
描述
CPE ADSL ANALOG FRONT END

ST70136G 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Obsolete零件包装代码:QFP
包装说明:10 X 10 MM, 1.40 MM HEIGHT, PLASTIC, TQFP-64针数:64
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.74Is Samacsys:N
JESD-30 代码:S-PQFP-G64JESD-609代码:e4
长度:10 mm功能数量:1
端子数量:64最高工作温度:70 °C
最低工作温度:封装主体材料:PLASTIC/EPOXY
封装代码:LFQFP封装等效代码:QFP64,.47SQ,20
封装形状:SQUARE封装形式:FLATPACK, LOW PROFILE, FINE PITCH
峰值回流温度(摄氏度):NOT SPECIFIED电源:3.3,5 V
认证状态:Not Qualified座面最大高度:1.6 mm
子类别:Other Telecom ICs表面贴装:YES
技术:BICMOS电信集成电路类型:MODEM-SUPPORT CIRCUIT
温度等级:COMMERCIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:10 mmBase Number Matches:1

ST70136G 数据手册

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ST70136  
CPE ADSL ANALOG FRONT END  
WIDE TRANSMIT AND RECEIVE DYNAMIC  
RANGE TO REDUCE EXTERNAL  
FILTERING REQUIREMENTS  
The AFE receive path contains a programmable  
gain amplifier (RxPGA), a low pass anti-aliasing  
filter, and a 12-bit A/D converter. The RxPGA is  
digitally programmable from 0 to 31dB in 1dB  
steps.  
RECEIVE PROGRAMMABLE GAIN: 0 TO  
31dB GAIN IN 1dB STEPS  
RECEIVE PROGRAMMABLE ATTENUATOR  
0,-4dB, -8dB, -12dB  
The AFE transmit path consists of a 14-bit D/A  
converter, followed by a programmable gain  
amplifier (TxPGA). The transmit gain is program-  
mable from 0 to -15dB in 1dB steps.  
12-BIT A/D CONVERTER IN RECEIVE PATH  
TRANSMIT PROGRAMMABLE GAIN: 0 TO  
-15dB IN 1dB STEPS  
14-BIT D/A CONVERTER IN TRANSMIT PATH  
LOW POWER MODE: 10mW IN LISTENING  
MODE, 250 W IN POWER DOWN  
µ
TONE DETECTOR: ACTIVITY DETECTION  
FOR WAKE-UP FUNCTION  
64-PIN TQFP PACKAGE  
64-PIN LFBGA PACKAGE  
0.50µm, 5V BICMOS TECHNOLOGY  
3.3V DIGITAL INTERFACE  
5V ANALOG INTERFACE  
TQFP64 Full Plastic  
(10 x 10 x 1.40 mm)  
ORDER CODE: ST70136G  
INTRODUCTION  
The ST70136 ADSL Analog Front End (AFE) chip  
implements the analog transceiver functions  
required in a Customer Premise ADSL modem. It  
connects the digital modem chip with the loop  
driver and hybrid balance circuits.  
The AFE has been designed with high dynamic  
range in order to greatly reduce the external filter-  
ing requirements at the front end.  
LFBGA64  
(8 x 8 x 1.7 mm)  
The AFE chip and its companion digital chip along  
with a loop driver, implement the complete  
G.992.2 and G.992.1 DMT modem solution.  
ORDER CODE: ST70136B  
Figure 1 : Overall Application Block Diagram  
Software for Control xDSL  
LINE  
PCI  
or  
PCI  
or  
USB  
xDSL  
AFE  
LOOP  
DRIVER  
PC  
HYBRID  
DMT  
USB  
ST70137  
ST70136  
TS612/TS652  
September 2001  
1/24  

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