Datasheet > ST20GP6

ST20GP6

更新时间： 2022-01-19 11:32:00

品牌	Logo	应用领域
其他 - ETC		全球定位系统
页数	文件大小	规格书
123页	954K
描述
GPS PROCESSOR

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ST20GP6 数据手册

ST20-GP6

GPS PROCESSOR

PRELIMINARY DATA

FEATURES

■ Application specific features

• 12 channel GPS correlation DSP hardware,

ST20 CPU (for control and position

calculations) and memory on one chip

GPS

radio

• no TCXO required

ST20-GP6

• RTCA-SC159 / WAAS / EGNOS supported

■ GPS performance

• accuracy

- stand alone with SA on <100m, SA off <30m

- differential <1m

- surveying <1cm

12 channel GPS

hardware DSP

ST20

CPU

• time to first fix

- autonomous start 90s

- cold start 45s

Low

power

controller

- warm start 7s

Interrupt

controller

- obscuration 1s

■ Enhanced 32-bit VL-RISC CPU - C2 core

• 16/33/50 MHz processor clock

Real time

clock/calendar

• 25 MIPS at 33 MHz

• fast integer/bit operations

Serial

communications

2 UART (ASC)

■ 64 Kbytes on-chip SRAM

■ 128 Kbytes on-chip ROM

Programmable

memory

■ Programmable memory interface

• 4 separately configurable regions

Parallel

input/output

interface

• 8/16-bits wide

• support for mixed memory

• 2 cycle external access

64K

SRAM

Diagnostic

control unit

■ Programmable UART (ASC)

■ Parallel I/O

■ Vectored interrupt subsystem

■ Diagnostic control unit

■ Power management

• low power operation

128K optional

mask ROM

Test

access port

• power down modes

■ Professional toolset support

• ANSI C compiler/link driver and libraries

• Debugging/profiling and simulation tools

APPLICATIONS

■ Global Positioning System (GPS) receivers

■ Car navigation systems

■ Fleet management systems

■ Technology

• Static clocked 50 MHz design

• 3.3 V, sub micron technology

■ Time reference for telecom systems

■ 100 pin PQFP package

■ JTAG Test Access Port

42 1707 02

1/123

December 1998

The information in this datasheet is subject to change

12 3 4 5 6 7...123

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