ST16C654IQ64

更新时间： 2024-11-21 22:16:11

品牌	Logo	应用领域
艾科嘉 - EXAR		先进先出芯片
页数	文件大小	规格书
51页	911K
描述
2.97V TO 5.5V QUAD UART WITH 64-BYTE FIFO

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ST16C654IQ64 数据手册

ST16C654/654D

2.97V TO 5.5V QUAD UART WITH 64-BYTE FIFO

OCTOBER 2003

REV. 5.0.0

FEATURES

GENERAL DESCRIPTION

• Pin-to-pin compatible with ST16C454, ST16C554

The ST16C654/654D (654) is an enhanced quad

Universal Asynchronous Receiver and Transmitter

(UART) each with 64 bytes of transmit and receive

FIFOs, transmit and receive FIFO trigger levels,

automatic hardware and software flow control, and

data rates of up to 1.5 Mbps. Each UART has a set of

registers that provide the user with operating status

and control, receiver error indications, and modem

serial interface controls. Selectable interrupt polarity

provides flexibility to meet design requirements. An

internal loopback capability allows onboard

diagnostics. The 654 is available in 64 pin TQFP, 68

pin PLCC and 100 pin QFP packages. The 64 pin

package only offers the 16 mode interface, but the 68

and 100 pin packages offer an additional 68 mode

interface which allows easy integration with Motorola

processors. The ST16C654CQ64 (64 pin) offers

and TI’s TL16C554AFN and TL16C754BFN

• Intel or Motorola Data Bus Interface select

• Four independent UART channels

■ Register Set Compatible to 16C550

■ Data rates of up to 1.5 Mbps

■ 64 Byte Transmit FIFO

■ 64 Byte Receive FIFO with error tags

■ 4 Selectable TX and RX FIFO Trigger Levels

■ Automatic Hardware (RTS/CTS) Flow Control

■ Automatic Software (Xon/Xoff) Flow Control

■ Progammable Xon/Xoff characters

■ Wireless Infrared (IrDA 1.0) Encoder/Decoder

■ Full modem interface

• 2.97V to 5.5V supply operation

three

state

interrupt

output

while

the

• Sleep Mode (200 uA typical)

ST16C654DCQ64 provides continuous interrupt

output. The 100 pin package provides additional

FIFO status outputs (TXRDY# and RXRDY# A-D),

separate infrared transmit data outputs (IRTX A-D)

and channel C external clock input (CHCCLK). The

ST16C654/654D is compatible with the industry

standard ST16C454 and ST16C654/554D.

• Crystal oscillator or external clock input

APPLICATIONS

• Portable Appliances

• Telecommunication Network Routers

• Ethernet Network Routers

NOTE: 1 Covered by U.S. Patent #5,649,122.

• Cellular Data Devices

• Factory Automation and Process Controls

FIGURE 1. ST16C654 BLOCK DIAGRAM

2.97V to 5.5V VCC

GND

A2:A0

D7:D0

UART Channel A

64 Byte TX FIFO

IOR#

IOW#

UART

TXA, RXA, IRTXA, DTRA#,

DSRA#, RTSA#, CTSA#,

CDA#, RIA#

Regs

ENDEC

TX & RX

CSA#

CSB#

CSC#

CSD#

BRG

64 Byte RX FIFO

TXB, RXB, IRTXB, DTRB#,

DSRB#, RTSB#, CTSB#,

CDB#, RIB#

UART Channel B

(same as Channel A)

INTA

INTB

INTC

Data Bus

Interface

TXC, RXC, IRTXC, DTRC#,

DSRC#, RTSC#, CTSC#,

CDC#, RIC#

UART Channel C

(same as Channel A)

INTD

CHCCLK

TXRDY# A-D

RXRDY# A-D

Reset

TXD, RXD, IRTXD, DTRD#,

DSRD#, RTSD#, CTSD#,

CDD#, RID#

UART Channel D

(same as Channel A)

16/68#

INTSEL

CLKSEL

XTAL1

XTAL2

Crystal Osc/Buffer

654 BLK

Exar Corporation 48720 Kato Road, Fremont CA, 94538• (510) 668-7000 • FAX (510) 668-7017 • www.exar.com

12 3 4 5 6 7...51

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