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ST16C2552CJ44 PDF预览

ST16C2552CJ44

更新时间： 2024-02-10 09:09:39
品牌 Logo 应用领域
艾科嘉 - EXAR 先进先出芯片
页数 文件大小 规格书
28页 119K
描述
DUAL ASYNCHRONOUS RECEIVER/TRANSMITTER WITH FIFOs

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中文翻译

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ST16C2552CJ44 技术参数

是否Rohs认证：符合生命周期：Active
Reach Compliance Code：compliantHTS代码：8542.31.00.01
风险等级：5.67Is Samacsys：N
JESD-30 代码：S-PQCC-J44JESD-609代码：e3
湿度敏感等级：1端子数量：44
最高工作温度：70 °C最低工作温度：
封装主体材料：PLASTIC/EPOXY封装代码：QCCJ
封装等效代码：LDCC44,.7SQ封装形状：SQUARE
封装形式：CHIP CARRIER电源：3.3/5 V
认证状态：Not Qualified子类别：Serial IO/Communication Controllers
表面贴装：YES技术：CMOS
温度等级：COMMERCIAL端子面层：Matte Tin (Sn)
端子形式：J BEND端子节距：1.27 mm
端子位置：QUADuPs/uCs/外围集成电路类型：SERIAL IO/COMMUNICATION CONTROLLER, SERIAL
Base Number Matches：1

ST16C2552CJ44 数据手册

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ST16C2552  
STARTECH  
Printed December 17, 1996  
An  
Company  
DUAL ASYNCHRONOUS RECEIVER/TRANSMITTER WITH FIFOs  
DESCRIPTION  
PLCC Package  
The ST16C2552 is a dual asynchronous receiver and  
transmitter with 16 byte transmit and receive FIFOs.  
Independent programmable baud rate generators are  
provided to select transmit and receive clock rates  
from 50Hz to 1.5 MHz for each UART.  
The on board status registers of the ST16C2552  
provide the error conditions, type and status of the  
transfer operation being performed. Complete MO-  
DEM control capability and a processor interrupt  
system that may be software tailored to the user’s  
requirements are included. The ST16C2552 provides  
internal loop-back capability for on board diagnostic  
testing.  
D5  
D6  
D7  
7
8
9
39  
RXA  
38 TXA  
37 DTRA*  
36 RTSA*  
A0 10  
XTAL1 11  
GND 12  
XTAL2 13  
A1 14  
35  
MFA*  
34 INTA  
ST16C2552CJ44  
33 VCC  
32 TXRDYB*  
31  
A2 15  
RIB*  
CHSEL 16  
INTB 17  
30 CDB*  
Signalling for DMA transfers is done through two pins  
per channel ( TXRDY*, RXRDY* ). The RXRDY*  
function is multiplexed on one pin with the OP2* and  
BAUDOUT functions. CPU can select these functions  
through the Alternate Function Register.  
29 DSRB*  
The ST16C2552 is fabricated in an advanced 0.6m  
CMOS process to achieve low power and high speed  
requirements.  
FEATURES  
· Pin to pin and functional compatible to National  
NS16C552  
· 16 byte transmit FIFO  
N.C.  
1
2
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
RXA  
· 16 byte receive FIFO with error flags  
· Modem control signals (CTS*, RTS*, DSR*, DTR*,  
RI*, CD*)  
· Programmable character lengths (5, 6, 7, 8) bits  
· Even, odd, ornoparitybitgenerationanddetection  
· Status report register  
D5  
D6  
TXA  
DTRA*  
RTSA*  
MFA*  
INTA  
3
D7  
4
A0  
5
XTAL1  
GND  
XTAL2  
A1  
6
ST16C2552CQ48  
7
VCC  
· TTL compatible inputs, outputs  
8
TXRDYB*  
RIB*  
· Independent transmit and receive control  
· Software compatible with INS8250, NS16C550  
· 460.8 kHz transmit/receive operation with 7.372  
MHz crystal or external clock source  
9
A2  
CDB*  
DSRB*  
N.C.  
10  
11  
12  
CHSEL  
INTB  
ORDERING INFORMATION  
Partnumber  
Package  
PLCC  
PLCC  
Operating temperature  
0° C to + 70° C  
-40° C to + 85° C  
ST16C2552CJ44  
ST16C2552IJ44  
Rev. 2.0  
3-135  
1234567...28

中文翻译

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