SSTV16859

更新时间： 2024-11-15 22:50:07

品牌	Logo	应用领域
飞兆/仙童 - FAIRCHILD		/
页数	文件大小	规格书
8页	171K
描述
Dual Output 13-Bit Register with SSTL-2 Compatible I/O and Reset

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SSTV16859 数据手册

March 2001

Revised July 2002

SSTV16859

Dual Output 13-Bit Register with

SSTL-2 Compatible I/O and Reset

General Description

Features

I Compliant with DDR-I registered module specifications

The SSTV16859 is a dual output 13-bit register designed

for use with 184 and 232 pin DDR-1 memory modules. The

device has a differential input clock, SSTL-2 compatible

data inputs and a LVCMOS compatible RESET input. The

device has been designed to meet the JEDEC DDR mod-

ule register specifications.

I Operates at 2.5V 0.2V V_DD

I SSTL-2 compatible input structure

I SSTL-2 compliant output structure

I Differential SSTL-2 compatible clock inputs

I Low power mode when device is reset

I Industry standard 64 pin TSSOP package

The device has been fabricated on an advanced sub-

micron CMOS process and is designed to operate at power

supplies of less than 3.6V’s.

I Also packaged in plastic Fine-Pitch Ball Grid Array

(FBGA)

Ordering Code:

Order Number Package Number

Package Description

SSTV16859G

BGA96A

96-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide

(Note 1)(Note 2)

SSTV16859MTD

(Note 2)

MTD64

64-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

Note 1: Ordering code “G” indicates Trays.

Note 2: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

DS500414

www.fairchildsemi.com

12 3 4 5 6 7 8

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与SSTV16859相关器件

型号	品牌	获取价格	描述	数据表
SSTV16859BS	NXP	获取价格	2.5 V 13-bit to 26-bit SSTL_2 registered buffer for stacked DDR DIMM
SSTV16859BS	PHILIPS	获取价格	Bus Driver, CMOS, PQCC56
SSTV16859BS,118	NXP	获取价格	IC SSTV SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PQCC56, 8 X 8 MM, 0.85 M
SSTV16859BS,151	NXP	获取价格	IC SSTV SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PQCC56, PLASTIC, HVQFN-5
SSTV16859BS,157	NXP	获取价格	IC SSTV SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PQCC56, PLASTIC, HVQFN-5
SSTV16859BS-T	NXP	获取价格	暂无描述
SSTV16859CGLF	IDT	获取价格	TSSOP-64, Tube
SSTV16859CGLF-T	IDT	获取价格	D Flip-Flop, SSTV Series, 1-Func, Positive Edge Triggered, 13-Bit, True Output, PDSO64, 0.
SSTV16859CKLF	IDT	获取价格	VFQFPN-56, Tray
SSTV16859DGG	NXP	获取价格	2.5 V 13-bit to 26-bit SSTL_2 registered buffer for stacked DDR DIMM