512 Kilobit (64K x 8) Page Mode EEPROM
SST29EE512A / SST29LE512A / SST29VE512A
Data Sheet
FEATURES:
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Single Voltage Read and Write Operations
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Fast Read Access Time
– 5.0V-only for SST29EE512A
– 3.0-3.6V for SST29LE512A
– 2.7-3.6V for SST29VE512A
– 5.0V-only operation: 70 and 90 ns
– 3.0-3.6V operation: 150 and 200 ns
– 2.7-3.6V operation: 200 and 250 ns
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Superior Reliability
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Latched Address and Data
2
– Endurance: 100,000 Cycles (typical)
– Greater than 100 years Data Retention
Automatic Write Timing
– Internal VPP Generation
End of Write Detection
Low Power Consumption
•
3
– Active Current: 20 mA (typical) for 5V and
10 mA (typical) for 3.0/2.7V
– Standby Current: 10 µA (typical)
– Toggle Bit
– Data# Polling
4
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Hardware and Software Data Protection
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Fast Page Write Operation
TTL I/O Compatibility
– 128 Bytes per Page, 512 Pages
– Page Write Cycle: 5 ms (typical)
– Complete Memory Rewrite: 2.5 sec (typical)
– Effective Byte Write Cycle
JEDEC Standard
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– Flash EEPROM Pinouts and command sets
Packages Available
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Time: 39 µs (typical)
6
– 32 Pin PDIP
– 32-Pin PLCC
– 32-Pin TSOP (8mm x 20mm)
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PRODUCT DESCRIPTION
The SST29EE512A/29LE512A/29VE512A are suited
for applications that require convenient and economical
updatingofprogram, configuration, ordatamemory. For
all system applications, the SST29EE512A/29LE512A/
29VE512A significantly improve performance and reli-
ability, while lowering power consumption. The
SST29EE512A/29LE512A/29VE512A improve flexibil-
itywhileloweringthecostforprogram,data,andconfigu-
ration storage applications.
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The SST29EE512A/29LE512A/29VE512A are 64K x 8
CMOS, Page Write EEPROMs manufactured with
SST’sproprietary,highperformanceCMOSSuperFlash
technology. The split-gate cell design and thick oxide
tunneling injector attain better reliability and
manufacturability compared with alternate approaches.
The SST29EE512A/29LE512A/29VE512A write with a
singlepowersupply.InternalErase/Programistranspar-
ent to the user. The SST29EE512A/29LE512A/
29VE512AconformtoJEDECstandardpinoutsforbyte-
wide memories.
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To meet high density, surface mount requirements, the
SST29EE512A/29LE512A/29VE512Aareofferedin32-
pin TSOP and 32-lead PLCC packages. A 600-mil, 32-
pin PDIP package is also available. See Figures 1 and 2
for pinouts.
Featuring high performance page write, the
SST29EE512A/29LE512A/29VE512A provide a typical
byte-write time of 39 µsec. The entire memory, i.e., 64
KBytes, can be written page-by-page in as little as 2.5
seconds, when using interface features such as Toggle
Bit or Data# Polling to indicate the completion of a write
cycle. To protect against inadvertent write, the
SST29EE512A/29LE512A/29VE512A have on-chip
hardware and software data protection schemes. De-
signed, manufactured, andtestedforawidespectrumof
applications, the SST29EE512A/29LE512A/29VE512A
are offered with a guaranteed page write endurance of
104 cycles. Data retention is rated at greater than 100
years.
Device Operation
TheSSTpagemodeEEPROMoffersin-circuitelectrical
write capability. The SST29EE512A/29LE512A/
29VE512A do not require separate Erase and Program
operations. The internally timed write cycle executes
both erase and program transparently to the user.
The SST29EE512A/29LE512A/29VE512A have indus-
try standard Software Data Protection. The
SST29EE512A/29LE512A/29VE512A are compatible
with industry standard EEPROM pinouts and
functionality.
3©0129-0919 2S/i9li9con Storage Technology, Inc. The SST logo and SuperFlash are registered tradema1rks of Silicon Storage Technology, Inc. These specifications are subject to change without notice.