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SST26VF040AT-80I/SNVXX PDF预览

SST26VF040AT-80I/SNVXX

更新时间: 2024-09-19 02:43:23
品牌 Logo 应用领域
美国微芯 - MICROCHIP /
页数 文件大小 规格书
73页 781K
描述
2.5V/3.0V 4-Mbit Serial Quad I/O™ (SQI™) Flash Memory

SST26VF040AT-80I/SNVXX 数据手册

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SST26VF040A  
2.5V/3.0V 4-Mbit Serial Quad I/O™ (SQI™) Flash Memory  
• Security ID:  
Features  
- One-Time-Programmable (OTP) 2-Kbyte  
• Single Voltage Read and Write Operations:  
Secure ID:  
- 2.7V-3.6V or 2.3V-3.6V  
- 128-bit unique, factory preprogrammed  
identifier  
• Serial Interface Architecture:  
- Nibble-wide multiplexed I/O’s with SPI-like  
- User-programmable area  
serial command structure:  
Temperature Range:  
- Mode 0 and Mode 3  
- Industrial: -40°C to +85°C  
- x1/x2/x4 Serial Peripheral Interface (SPI) Protocol  
- Extended: -40°C to +125°C  
• High-Speed Clock Frequency:  
• Automotive AEC-Q100 Qualified  
- 2.7V-3.6V: 104 MHz maximum (Industrial)  
• Packages Available:  
- 2.3V-3.6V: 80 MHz maximum (Industrial and  
- 8-contact WDFN (6 mm x 5 mm)  
Extended)  
- 8-lead SOIC (3.90 mm)  
• Burst Modes:  
• All Devices are RoHS Compliant  
- Continuous linear burst  
- 8/16/32/64-byte linear burst with wrap-around  
Product Description  
• Superior Reliability:  
The Serial Quad I/O™ (SQI™) family of Flash memory  
- Endurance: 100,000 cycles (minimum)  
devices features a six-wire, 4-bit I/O interface that  
- Greater than 100 years data retention  
allows for low-power, high-performance operation in a  
• Low-Power Consumption:  
low pin count package. SST26VF040A also supports  
- Active Read current: 15 mA (typical @  
104 MHz)  
full command-set compatibility to traditional Serial  
Peripheral Interface (SPI) protocol. System designs  
using SQI Flash devices occupy less board space and  
ultimately lower system costs.  
- Standby Current: 15 µA (typical)  
• Fast Erase Time:  
- Sector/Block Erase: 20 ms (typical), 25 ms  
(maximum)  
All members of the 26 Series, SQI family are manufac-  
tured with proprietary, high-performance CMOS Super-  
Flash® technology. The split-gate cell design and  
thick-oxide tunneling injector attain better reliability and  
manufacturability compared with alternate approaches.  
- Chip Erase: 40 ms (typical), 50 ms  
(maximum)  
• Page-Program:  
SST26VF040A significantly improves performance and  
reliability, while lowering power consumption. These  
devices write (Program or Erase) with a single-power  
supply of 2.3V-3.6V. The total energy consumed is a  
function of the applied voltage, current and time of  
application. Since for any given voltage range, the  
SuperFlash technology uses less current to program  
and has a shorter erase time, the total energy  
consumed during any erase or program operation is  
less than alternative Flash memory technologies.  
- 256 bytes per page in x1 or x4 mode  
• End-of-Write Detection:  
- Software polling the BUSY bit in STATUS  
register  
• Flexible Erase Capability:  
- Uniform 4-Kbyte sectors  
- Uniform 32-Kbyte overlay blocks  
- Uniform 64-Kbyte overlay blocks  
• Write-Suspend:  
See Figure 2-1 for pin assignments.  
- Suspend program or erase operation to  
access another block/sector  
• Software Reset (RST) mode  
• Software Write Protection:  
- Write protection through Block Protection bits  
in STATUS register  
2020-2021 Microchip Technology Inc.  
DS20006292B-page 1  

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