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SST25VF040B-50-4C-SAF

更新时间： 2024-11-07 04:30:43
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SST 闪存
页数 文件大小 规格书
30页 511K
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4 Mbit SPI Serial Flash

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SST25VF040B-50-4C-SAF 数据手册

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4 Mbit SPI Serial Flash  
SST25VF040B  
SST25VF040B4Mb Serial Peripheral Interface (SPI) flash memory  
Data Sheet  
FEATURES:  
•
•
•
•
Single Voltage Read and Write Operations  
– 2.7-3.6V  
Serial Interface Architecture  
– SPI Compatible: Mode 0 and Mode 3  
High Speed Clock Frequency  
– 50 MHz  
•
•
•
•
•
•
•
Auto Address Increment (AAI) Programming  
– Decrease total chip programming time over  
Byte-Program operations  
End-of-Write Detection  
– Software polling the BUSY bit in Status Register  
– Busy Status readout on SO pin in AAI Mode  
Hold Pin (HOLD#)  
– Suspends a serial sequence to the memory  
without deselecting the device  
Superior Reliability  
– Endurance: 100,000 Cycles (typical)  
– Greater than 100 years Data Retention  
Write Protection (WP#)  
– Enables/Disables the Lock-Down function of the  
status register  
•
•
Low Power Consumption:  
– Active Read Current: 10 mA (typical)  
– Standby Current: 5 µA (typical)  
Software Write Protection  
– Write protection through Block-Protection bits in  
status register  
Flexible Erase Capability  
– Uniform 4 KByte sectors  
– Uniform 32 KByte overlay blocks  
– Uniform 64 KByte overlay blocks  
Fast Erase and Byte-Program:  
– Chip-Erase Time: 35 ms (typical)  
– Sector-/Block-Erase Time: 18 ms (typical)  
– Byte-Program Time: 7 µs (typical)  
Temperature Range  
– Commercial: 0°C to +70°C  
– Industrial: -40°C to +85°C  
•
Packages Available  
– 8-lead SOIC (200 mils)  
– 8-lead SOIC (150 mils)  
– 8-contact WSON (6mm x 5mm)  
PRODUCT DESCRIPTION  
The 25 series Serial Flash family features a four-wire, SPI-  
compatible interface that allows for a low pin-count pack-  
age which occupies less board space and ultimately lowers  
total system costs. The SST25VF040B devices are  
enhanced with improved operating frequency and even  
lower power consumption than the original SST25VFxxxA  
devices. SST25VF040B SPI serial flash memories are  
manufactured with SST proprietary, high-performance  
CMOS SuperFlash technology. The split-gate cell design  
and thick-oxide tunneling injector attain better reliability and  
manufacturability compared with alternate approaches.  
The SST25VF040B devices significantly improve perfor-  
mance and reliability, while lowering power consumption.  
The devices write (Program or Erase) with a single power  
supply of 2.7-3.6V for SST25VF040B. The total energy  
consumed is a function of the applied voltage, current, and  
time of application. Since for any given voltage range, the  
SuperFlash technology uses less current to program and  
has a shorter erase time, the total energy consumed during  
any Erase or Program operation is less than alternative  
flash memory technologies.  
The SST25VF040B device is offered in an 8-lead SOIC  
(200 mils), 8-lead SOIC (150 mils), and 8-contact WSON  
(6mm x 5mm) packages. See Figure 2 for pin assignments.  
©2007 Silicon Storage Technology, Inc.  
The SST logo and SuperFlash are registered Trademarks of Silicon Storage Technology, Inc.  
These specifications are subject to change without notice.  
S71295-02-000  
1
7/07  
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