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SST25VF032B-50-4C-SCF

更新时间： 2024-11-19 04:30:43
品牌 Logo 应用领域
SST 闪存内存集成电路光电二极管时钟
页数 文件大小 规格书
28页 736K
描述
32 Mbit SPI Serial Flash

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SST25VF032B-50-4C-SCF 数据手册

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32 Mbit SPI Serial Flash  
SST25VF032B  
SST25VF032B32Mb Serial Peripheral Interface (SPI) flash memory  
Advance Information  
FEATURES:  
•
•
•
•
Single Voltage Read and Write Operations  
– 2.7-3.6V  
Serial Interface Architecture  
– SPI Compatible: Mode 0 and Mode 3  
High Speed Clock Frequency  
– 50 MHz Max  
•
•
•
•
•
•
•
End-of-Write Detection  
– Software polling the BUSY bit in Status Register  
– Busy Status readout on SO pin  
Hold Pin (HOLD#)  
– Suspends a serial sequence to the memory  
without deselecting the device  
Write Protection (WP#)  
– Enables/Disables the Lock-Down function of the  
status register  
Superior Reliability  
– Endurance: 100,000 Cycles (typical)  
– Greater than 100 years Data Retention  
Software Write Protection  
– Write protection through Block-Protection bits in  
status register  
•
•
Low Power Consumption:  
– Active Read Current: 10 mA (typical)  
– Standby Current: 5 µA (typical)  
Temperature Range  
– Commercial: 0°C to +70°C  
– Industrial: -40°C to +85°C  
Flexible Erase Capability  
– Uniform 4 KByte sectors  
– Uniform 32 KByte overlay blocks  
– Uniform 64 KByte overlay blocks  
Fast Erase and Byte-Program:  
– Chip-Erase Time: 35 ms (typical)  
– Sector-/Block-Erase Time: 18 ms (typical)  
– Byte-Program Time: 7 µs (typical)  
Packages Available  
– 8-lead SOIC (200 mils)  
– 16-lead SOIC (300 mils)  
•
•
All non-Pb (lead-free) devices are RoHS compliant  
Auto Address Increment (AAI) Word Programming  
– Decrease total chip programming time over  
Byte-Program operations  
PRODUCT DESCRIPTION  
The SST 25 series Serial Flash family features a four-wire,  
SPI-compatible interface that allows for a low pin-count  
package which occupies less board space and ultimately  
lowers total system costs. SST25VF032B SPI serial flash  
memories are manufactured with SST’s proprietary, high-  
performance CMOS SuperFlash technology. The split-gate  
cell design and thick-oxide tunneling injector attain better  
reliability and manufacturability compared with alternate  
approaches.  
supply of 2.7-3.6V for SST25VF032B. The total energy  
consumed is a function of the applied voltage, current, and  
time of application. Since for any given voltage range, the  
SuperFlash technology uses less current to program and  
has a shorter erase time, the total energy consumed during  
any Erase or Program operation is less than alternative  
flash memory technologies.  
The SST25VF032B device is offered in both 8-lead SOIC  
(200 mils) and 16-lead SOIC (300 mils) packages. See Fig-  
ures 2 and 3 for pin assignments.  
The SST25VF032B devices significantly improve perfor-  
mance and reliability, while lowering power consumption.  
The devices write (Program or Erase) with a single power  
©2006 Silicon Storage Technology, Inc.  
The SST logo and SuperFlash are registered Trademarks of Silicon Storage Technology, Inc.  
These specifications are subject to change without notice.  
S71327-00-000  
1
10/06  
1234567...28

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