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SPQ4R1N30WP PDF预览

SPQ4R1N30WP

更新时间: 2024-09-24 17:15:55
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中科君芯 - CAS-JUNSHINE /
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3页 333K
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LV-SGT

SPQ4R1N30WP 数据手册

 浏览型号SPQ4R1N30WP的Datasheet PDF文件第2页浏览型号SPQ4R1N30WP的Datasheet PDF文件第3页 
SPQ4R1N30WP  
SYMBOL  
30V, 30A (1) N-Channel MOSFET  
Proprietary Trench Gate Device Design and Processes  
High Reliability Capability  
Drain  
Sampled CP Probing and Inking  
Gate  
Source  
Electrical Characteristics in C/P Test (TJ at 25 )  
Symbol  
V(BR)DSS  
RDS(ON)  
VGS (th)  
IDSS  
Parameter  
Min. Typ. Max. Unit  
Test Condition  
Drain-Source Breakdown Voltage  
Static Drain-Source On-Resistance  
Gate Threshold Voltage  
30  
1
3
4.1  
2
V
mΩ  
V
VGS =0V, ID =250µA  
(2)  
VGS =4.5V, ID =1A  
VDS =VGS, ID =250µA  
VDS =24V, VGS =0V  
VDS =0V, VGS =±20V  
µ
A
Drain-to-Source Leakage Current  
Gate-Body Leakage Current  
Operating and Storage Temperature  
1
IGSS  
±100  
nA  
TJ, TSTG  
-55to 150Max.  
Mechanical Data  
Die Drawing  
1700 µ  
µ
µ
Chip Size  
m X 1180 m  
µ
Gate Pad Size  
125 m X 250 m  
µ
µ
Source Pad Size(1)(2)  
Source Pad Size(3)(4)  
Scribe Line Width  
Wafer Thickness  
Wafer Diameter  
Gross Die  
844 m X 210 m  
µ
µ
844 m X 210 m  
µ
60 m  
µ
100 m  
200 mm  
13621 EA  
µ
Source Metallization  
Drain Metallization  
Passivation  
Al-Cu (4 m typical)  
Ti-Ni-Ag  
SiN  
Recommended Storage  
Environment  
Store in original container, in dry nitrogen, 6  
months at ambient temperature of 23°C ± 3°C  
(1) This characteristic assumes the die is assembled in DFN5*6 package. Actual performance may degrade when  
assembled.  
(2) Pulse Width tp = < 1 mS, Duty Cycle < 2%.  
Address: Floor 5, C1 Building, No. 200, Linghu Blvd., Wuxi, Jiangshu, China  
Version: Preliminary Rev 0.1  
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