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SP8861/NA/HP PDF预览

SP8861/NA/HP

更新时间: 2024-01-23 11:15:02
品牌 Logo 应用领域
加拿大卓联 - ZARLINK 信号电路锁相环或频率合成电路
页数 文件大小 规格书
15页 282K
描述
1·3GHz Low Power Single-Chip Frequency Synthesiser

SP8861/NA/HP 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:QCCJ, LDCC28,.5SQReach Compliance Code:unknown
风险等级:5.14Is Samacsys:N
其他特性:4-BIT AUXILIARY INPUT COUNTER模拟集成电路 - 其他类型:PLL FREQUENCY SYNTHESIZER
JESD-30 代码:S-PQCC-C28JESD-609代码:e0
功能数量:1端子数量:28
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:QCCJ
封装等效代码:LDCC28,.5SQ封装形状:SQUARE
封装形式:CHIP CARRIER峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 V认证状态:Not Qualified
子类别:PLL or Frequency Synthesis Circuits最大供电电流 (Isup):40 mA
最大供电电压 (Vsup):5.25 V最小供电电压 (Vsup):4.75 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:BIPOLAR温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:C BEND
端子节距:1.27 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIEDBase Number Matches:1

SP8861/NA/HP 数据手册

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SP8861  
1·3GHz Low Power Single-Chip Frequency Synthesiser  
Supersedes version in the1996 Professional Products IC Handbook, HB2480 - 3.0  
DS3640 - 4.0 April 1998  
The SP8861 is a low power single chip synthesiser  
intended for professional radio applications, containing all the  
elements(apartfromtheloopamplifier)requiredtobuildaPLL  
frequency synthesis loop  
The device is serially programmable by a three-wire data  
highway and contains three independent buffers to store one  
reference divider word and two local oscillator divider words.  
A digital phase detector with two charge pumps,  
programmable in phase and gain, are provided to improve  
lock-up performance. The preset operation of the charge  
pumps can be overwritten or the comparison frequencies  
switched to output ports under control of the divider word. The  
dual modulus ratio and so operating range is also  
programmable through the same word.  
4
3
2
1
28 27 26  
5
25  
24  
23  
22  
21  
20  
19  
F
*
PD2 OUTPUT  
RPD  
REF  
6
POWER DOWN  
7
V
V
4
4
1
V
3
CC  
EE  
8
GROUND  
XTAL 1  
XTAL2  
SP8861  
CC  
CC  
9
V
A power down mode is incorporated as a battery economy  
feature.  
10  
11  
RF INPUT  
RF INPUT  
V
2
EE  
12 13 14 15 16 17 18  
FEATURES  
Improved Digital Phase Detector Eliminates  
‘Dead Band’ Effects  
HP28  
Low Operating Power, Typically 175mW  
1·3GHz Operating Frequency  
Complete Phase Locked Loop  
High Input Sensitivity  
Programmed throughThree-Wire Bus  
Wide Range of Reference Division Ratios  
Local Storage for Two Frequency Words, giving  
Rapid Frequency Toggling  
*FPD and FREF outputs are reversed by the phase  
detectorsensebitintheF1/F2programmingword. The  
abovediagramiscorrectwhenthesensebitislow. See  
Table 2 and Fig. 7.  
V
V
V
CC1, VEE1 – preamplifier and prescaler supplies  
CC2, VEE2 – oscillator supplies  
CC3, VEE3 – charge pump 2 supplies  
VCC4, VEE4 – ECL supplies  
Programmable Phase Detector Gain  
Power Down Mode  
Fig. 1 Pin identification diagram (top view)  
ABSOLUTE MAXIMUM RATINGS  
Supply voltage  
20·3V to 17V  
255°C to 1150°C  
240°C to 185°C  
2·5V p-p  
Storage temperature  
Operating temperature  
Prescaler input voltage  
ORDERING INFORMATION  
SP8861/NA/HP  

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