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SP8855E/IG/HCAR

更新时间： 2024-11-21 21:19:51
品牌 Logo 应用领域
加拿大卓联 - ZARLINK /
页数 文件大小 规格书
14页 445K
描述
PLL Frequency Synthesizer, BIPolar, CQCC44, LDCC-44

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中文翻译

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SP8855E/IG/HCAR 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
包装说明：QCCJ, LDCC44,.7SQReach Compliance Code：compliant
HTS代码：8542.39.00.01风险等级：5.17
模拟集成电路 - 其他类型：PLL FREQUENCY SYNTHESIZERJESD-30 代码：S-CQCC-J44
JESD-609代码：e0长度：16.5735 mm
湿度敏感等级：1功能数量：1
端子数量：44最高工作温度：85 °C
最低工作温度：-40 °C封装主体材料：CERAMIC, METAL-SEALED COFIRED
封装代码：QCCJ封装等效代码：LDCC44,.7SQ
封装形状：SQUARE封装形式：CHIP CARRIER
峰值回流温度（摄氏度）：225电源：5 V
认证状态：Not Qualified座面最大高度：3.43 mm
子类别：PLL or Frequency Synthesis Circuits最大供电电流 (Isup)：240 mA
最大供电电压 (Vsup)：5.25 V最小供电电压 (Vsup)：4.75 V
标称供电电压 (Vsup)：5 V表面贴装：YES
技术：BIPOLAR温度等级：INDUSTRIAL
端子面层：Tin/Lead (Sn/Pb)端子形式：J BEND
端子节距：1.27 mm端子位置：QUAD
处于峰值回流温度下的最长时间：30宽度：16.5735 mm
Base Number Matches：1

SP8855E/IG/HCAR 数据手册

 浏览型号SP8855E/IG/HCAR的Datasheet PDF文件第2页浏览型号SP8855E/IG/HCAR的Datasheet PDF文件第3页浏览型号SP8855E/IG/HCAR的Datasheet PDF文件第4页浏览型号SP8855E/IG/HCAR的Datasheet PDF文件第5页浏览型号SP8855E/IG/HCAR的Datasheet PDF文件第6页浏览型号SP8855E/IG/HCAR的Datasheet PDF文件第7页 
SP8855E  
2.8GHz Parallel Load Professional Synthesiser  
Advance Information  
DS4239  
ISSUE 3.0  
PIN 1  
March 1999  
The SP8855E is one of a family of parallel load  
synthesisers containing all the elements apart from the loop  
amplifier to fabricate a PLL synthesis loop. Other devices in  
the series are the SP8852E which is a fully programmable  
device requiring two 16 bit words to set the RF and reference  
counters, and the SP8854E which has hard wired reference  
counter programming and requires a single bit word to pro-  
gram the RF divider. The SP8855E replaces the existing  
SP8855D.  
The SP8855E is intended for applications where a fixed  
synthesiserfrequencyisrequiredalthoughitcanalsobeused  
where frequency selection is set by switches. In general the  
device will be programmed by connecting the programming  
pins to either VCC or ground. Additional hard wired inputs can  
HC44  
be used to control the Fpd and Fref outputs set the control  
direction of the loop and select the phase detector gain.  
Another input may be used to disable the phase detector  
output.  
The device is available in both plastic (HP) and ceramic  
(HC) J-leaded 44-lead chip carrier. Ambient temperature  
ranges available are shown in the ordering information.  
OPTIONAL  
PIN 1  
REFERENCE  
Features  
•
•
•
•
•
•
•
•
•
•
2.8GHz Operating Frequency (IG GRADE)  
Single 5V Supply Operation  
HP44  
High Comparison Frequency 50MHz  
High Gain Phase Detector 1mA/rad  
Programmable Phase Detector Gain  
Zero "Dead Band" Phase Detector  
Wide range of RF and Reference Divide Ratios  
Programming by Hard Wired Inputs  
Low cost plastic package option  
Pin  
1
2
3
4
5
6
7
8
Description  
Pin Description  
Control Direction  
Input bus bit 10  
Input bus bit 9  
Input bus bit 8  
Input bus bit 7  
Input bus bit 6  
Input bus bit 5  
Input bus bit 4  
Input bus bit 3  
Input bus bit 2  
Input bus bit 1  
Input bus bit 0  
0V (prescaler)  
RF input  
RF input  
VCC + 5V (prescaler)  
VEE 0V  
Lock detect output  
C-lock detect  
Rset  
Charge pump output  
Charge pump ref.  
Fref/Fpd enable  
23  
24  
25  
26  
27  
28  
29  
30  
31  
32  
33  
34  
35  
36  
37  
38  
39  
40  
41  
42  
43  
44  
Fpd*  
Fref*  
+5V  
Ref. osc capacitor  
Ref in/XTAL  
Reference bit 9  
Reference bit 8  
Reference bit 7  
Reference bit 6  
Reference bit 5  
Reference bit 4  
Reference bit 3  
Reference bit 2  
Reference bit 1  
Reference bit 0  
Phase Detect Enable  
Phase Detect Gain 1  
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
GPS HI-REL level a screened option  
Absolute Maximum Ratings  
Supply voltage  
Storage temperature  
Operating temperature  
Prescaler & reference Input Voltage  
-0.3V to 6V  
-65 °C to +150°C  
-55°C to +100°C  
2.5V p-p  
Data Inputs  
VCC +0.3V  
Phase Detect Gain  
Input bus bit 13  
Input bus bit 12  
Input bus bit 11  
0
VEE -0.3V  
Junction temperature  
+ 175°C (HC package)  
+ 150°C (HP package)  
*Fpd and Fref outputs are reversed using the Control Direction  
input. The table above is correct when pin 23 is high.  
Figure 1 - Pin connections - top view  
1234567...14

中文翻译

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与SP8855E/IG/HCAR相关器件

型号 品牌 获取价格 描述 数据表
SP8855E/IG/HPAR ZARLINK

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 		PLL Frequency Synthesizer, BIPolar, PQCC44, PLASTIC, LCC-44
SP8855E/IG/HPAR ROCHESTER

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 		PLL FREQUENCY SYNTHESIZER, 2800 MHz, PQCC44, PLASTIC, LCC-44
SP8855E/KG/HCAR ZARLINK

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 		PLL Frequency Synthesizer, BIPolar, CQCC44, LDCC-44
SP8855E/KG/HCAR MICROSEMI

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 		PLL Frequency Synthesizer, BIPolar, CQCC44, CERAMIC, LCC-44
SP8855E/MA/HCAR ZARLINK

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 		PLL Frequency Synthesizer, BIPolar, CQCC44, LDCC-44
SP8855EIGHCAR DYNEX

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 		PLL Frequency Synthesizer, BIPolar, CQCC44
SP8855EKGHCAR DYNEX

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 		PLL Frequency Synthesizer, BIPolar, CQCC44
SP8858 ZARLINK

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 		1·5GHz Professional Synthesiser
SP8858 MITEL

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 		1·5GHz Professional Synthesiser
SP8858/IG/HCAR MICROSEMI

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 		PLL Frequency Synthesizer, BIPolar, CQCC28, LDCC-28

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