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SP8401KGMPES PDF预览

SP8401KGMPES

更新时间: 2024-11-12 04:03:19
品牌 Logo 应用领域
加拿大卓联 - ZARLINK 逻辑集成电路光电二极管时钟
页数 文件大小 规格书
4页 346K
描述
Very Low Phase Noise 300MHz ± 10/11

SP8401KGMPES 数据手册

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SP8401  
Very Low Phase Noise 300MHz ÷ 10/11  
DS3230  
ISSUE 3.1  
April 1994  
The SP8401 is a very low phase noise variable modulus  
divider. Special circuit techniques have been used to reduce  
the phase noise considerably below that produced by  
standard dividers. The modulus control input is CMOS or TTL  
compatible.  
Ordering Information  
SP8401 KG MPES(Commercial Grade)  
The SP8401 is packaged in a 28 pin plastic SO package  
to be compatible with the SP8400 and SP8402 devices.  
FEATURES  
I Very low Phase Noise (Typically -160dBc/Hz at 1kHz  
offset)  
I Supply Voltage 5V  
1
2
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
N/C  
N/C  
N/C  
+5V  
N/C  
N/C  
N/C  
N/C  
N/C  
N/C  
N/C  
3
4
V
CC  
ABSOLUTE MAXIMUM RATINGS  
5
GND  
Supply Voltage  
6.5V  
20mA  
6
CLOCK INPUT  
CLOCK INPUT  
CLOCK INPUT  
CLOCK INPUT  
GND  
Output Current  
7
Storage Temperature Range  
Maximum Clock Input Voltage  
-55°C to +125°C  
8
OUTPUT  
OUTPUT  
N/C  
2.5V p-p  
9
10  
11  
12  
13  
14  
V
V
+5V  
+5V  
N/C  
V
+5V  
CC  
CC  
CC  
N/C  
N/C  
N/C  
MODULUS CONTROL  
MP28  
Fig.1 Pin connections - top view  
0
–10  
–20  
–30  
–40  
–50  
–60  
–70  
–80  
–90  
–100  
–110  
–120  
–130  
–140  
–150  
–160  
–170  
1
10  
100  
1k  
10k  
100k  
Frequency (Hz)  
Fig.2 Typical single sideband phase noise measured at 300MHz  

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