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SP724AH PDF预览

SP724AH

更新时间: 2024-11-25 20:06:07
品牌 Logo 应用领域
瑞萨 - RENESAS /
页数 文件大小 规格书
6页 86K
描述
SCR ARRAY,SO

SP724AH 技术参数

生命周期:Transferred包装说明:,
Reach Compliance Code:compliant风险等级:5.61
子类别:Other Trigger Devices表面贴装:YES
Base Number Matches:1

SP724AH 数据手册

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SP724  
Data Sheet  
April 1999  
File Number 4458.3  
SCR/Diode Array for ESD and Transient  
Over-Voltage Protection  
Features  
• An Array of 4 SCR/Diode Pairs in 6-Lead SOT-23  
[ /Title  
(SP724  
)
/Sub-  
ject  
(SCR/  
Diode  
Array  
for  
The SP724 is a quad array of transient voltage clamping  
circuits designed to suppress ESD and other transient  
over-voltage events. The SP724 is used to help protect  
sensitive digital or analog input circuits on data, signal, or  
control lines operating on power supplies up to 20VDC.  
• ESD Capability per HBM Standards  
- IEC 1000-4-2, Direct Discharge . . . . . . . . 8kV (Level 4)  
- IEC 1000-4-2, Air Discharge. . . . . . . . . . 15kV (Level 4)  
- MIL STD 3015.7 . . . . . . . . . . . . . . . . . . . . . . . . . . .>8kV  
• Input Protection for Applications with Power Supplies Up  
to +20V (Single-Ended Voltage), and ±10V (Differential  
Voltage)  
The SP724 is comprised of bipolar SCR/diode structures to  
protect up to four independent lines by clamping transients  
of either polarity to the power supply rails. The SP724 offers  
very low leakage (1nA Typical) and low input capacitance  
(3pF Typical). Additionally, the SP724 is rated to withstand  
the IEC 1000-4-2 ESD specification for both contact and air  
discharge methods to level 4.  
• Rated for Peak Current Capability  
• Low Input Leakage. . . . . . . . . . . . . . . . . . . . . .1nA Typical  
• Low Input Capacitance. . . . . . . . . . . . . . . . . . .3pF Typical  
ESD  
and  
o
o
Tran-  
sient  
Over-  
Volt-  
age  
Protec-  
tion)  
/Autho  
r ()  
• Operating Temperature Range. . . . . . . . . -40 C to 105 C  
The SP724 is connected to the sensitive input line and its  
associated power supply lines. Clamping action occurs  
during the transient pulse, turning on the diode and fast  
triggering SCR structures when the voltage on the input line  
Applications  
• Microprocessor/Logic Input Protection  
• Data Bus Protection  
exceeds one V threshold above the V+ supply (or one  
BE  
V
threshold below the V- supply). Therefore, the SP724  
BE  
operation is unaffected by poor power supply regulation or  
voltage fluctuations within its operating range.  
• Analog Device Input Protection  
• Voltage Clamp  
Ordering Information  
Functional Block Diagram  
/Key-  
words  
(TVS,  
Tran-  
sient  
Sup-  
pres-  
sion,  
PART  
NUMBER  
TEMP. RANGE  
o
V+  
5
( C)  
PACKAGE  
PKG. NO.  
SP724AH  
SP724AHT  
SP724W  
-40 to 105  
-40 to 105  
-40 to 105  
6 Ld Plastic SOT-23 P6.064  
Tape and Reel  
3, 4 AND 6  
IN  
Wafer on Film Frame  
IN  
1
2
Pinout  
SP724  
(SOT-23)  
TOP VIEW  
Protec-  
tion,  
V-  
Auto-  
motive,  
Load  
Dump,  
Alter-  
nator  
Field  
Decay,  
6
5
4
3
NOTES:  
1. The design of the SP724 SCR/Diode ESD Protection Arrays is  
covered by Harris patent 4567500.  
2. The full ESD capability of the SP724 is achieved when wired in a  
circuit that includes connection to both the V+ and V- pins. When  
handling individual devices, follow proper procedures for  
electrostatic discharge.  
1
2
1-800-4-HARRIS or 407-727-9207 | Copyright © Harris Corporation 1999  
6-21  

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